gru: kevin: enable EC SPI interface
This configures and enables SPI interface #5 used for EC communications on Gru/Kevin. BRANCH=none BUG=chrome-os-partner:51537 TEST=with the appropriate depthcharge change it is possible to trigger booting Chrome OS from the SD card by pressing '^U' on Gru keyboard at the right time. Change-Id: I5304bf47e030c0b9b7794752f30ffdca6c03a4f4 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: b5cc177 Original-Change-Id: I99883daa60562ccddfaeb858c1957d497f05a501 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/346632 Reviewed-on: https://review.coreboot.org/15032 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -56,7 +56,7 @@ config DRAM_SIZE_MB
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config EC_GOOGLE_CHROMEEC_SPI_BUS
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config EC_GOOGLE_CHROMEEC_SPI_BUS
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hex
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hex
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default 0
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default 5
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config BOOT_MEDIA_SPI_BUS
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config BOOT_MEDIA_SPI_BUS
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int
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int
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@ -59,11 +59,14 @@ void bootblock_mainboard_early_init(void)
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void bootblock_mainboard_init(void)
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void bootblock_mainboard_init(void)
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{
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{
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/* select the pinmux for spi flashrom */
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/* Set pinmux and configure spi flashrom. */
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write32(&rk3399_pmugrf->spi1_rxd, IOMUX_SPI1_RX);
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write32(&rk3399_pmugrf->spi1_rxd, IOMUX_SPI1_RX);
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write32(&rk3399_pmugrf->spi1_csclktx, IOMUX_SPI1_CSCLKTX);
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write32(&rk3399_pmugrf->spi1_csclktx, IOMUX_SPI1_CSCLKTX);
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rockchip_spi_init(CONFIG_BOOT_MEDIA_SPI_BUS, 24750*KHz);
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rockchip_spi_init(CONFIG_BOOT_MEDIA_SPI_BUS, 24750*KHz);
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/* Set pinmux and configure EC flashrom. */
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write32(&rk3399_grf->iomux_spi5, IOMUX_SPI5);
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rockchip_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, 3093750);
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setup_chromeos_gpios();
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setup_chromeos_gpios();
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}
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}
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