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soc/amd: Move psp_transfer.h out of each SOC into common 

The psp_transfer.h file was the same under all SoCs, and is really
tied to the file common/vboot/transfer.c, not the SOC.

This patch makes an include directory under vboot to put the header into
and sets it to be included for all SoCs using SOC_AMD_COMMON. This makes
the header file available to all platforms, so that new chips that don't
use the psp_verstage don't have to make a psp_transfer.h file just to
satisfy the compiler.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I5b9f2adee3a1d4d8d32813ec0a850344b7d717b2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77303
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Martin Roth 2023-08-18 16:28:29 -06:00 committed by Martin L Roth
parent 7687e7767f
commit 8fc68816a9
14 changed files with 13 additions and 265 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

62
src/soc/amd/cezanne/include/soc/psp_transfer.h
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@ -1,62 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef AMD_CEZANNE_PSP_TRANSFER_H
#define AMD_CEZANNE_PSP_TRANSFER_H
# if (CONFIG_CMOS_RECOVERY_BYTE != 0)
# define CMOS_RECOVERY_BYTE CONFIG_CMOS_RECOVERY_BYTE
# elif CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)
# error "Must set CONFIG_CMOS_RECOVERY_BYTE"
# endif
#define CMOS_RECOVERY_MAGIC_VAL 0x96
#define TRANSFER_INFO_SIZE 64
#define TIMESTAMP_BUFFER_SIZE 0x200
#define TRANSFER_MAGIC_VAL 0x50544953
/* Bit definitions for the psp_info field in the PSP transfer_info_struct */
#define PSP_INFO_PRODUCTION_MODE 0x00000001UL
#define PSP_INFO_PRODUCTION_SILICON 0x00000002UL
#define PSP_INFO_VALID 0x80000000UL
/* Area for things that would cause errors in a linker script */
#if !defined(__ASSEMBLER__)
#include <stdint.h>
struct transfer_info_struct {
uint32_t magic_val; /* Identifier */
uint32_t struct_bytes; /* Size of this structure */
uint32_t buffer_size; /* Size of the transfer buffer area */
/* Offsets from start of transfer buffer */
uint32_t workbuf_offset;
uint32_t console_offset;
uint32_t timestamp_offset;
uint32_t fmap_offset;
uint32_t unused1[5];
/* Fields reserved for the PSP */
uint64_t timestamp; /* Offset 0x30 */
uint32_t psp_unused; /* Offset 0x38 */
uint32_t psp_info; /* Offset 0x3C */
};
_Static_assert(sizeof(struct transfer_info_struct) == TRANSFER_INFO_SIZE,
"TRANSFER_INFO_SIZE is incorrect");
/* Make sure the PSP transferred information over to x86 side. */
int transfer_buffer_valid(const struct transfer_info_struct *ptr);
/* Verify vboot work buffer is valid in transfer buffer */
void verify_psp_transfer_buf(void);
/* Display the transfer block's PSP_info data */
void show_psp_transfer_info(void);
/* Replays the pre-x86 cbmem console into the x86 cbmem console */
void replay_transfer_buffer_cbmemc(void);
/* Called by bootblock_c_entry in the VBOOT_STARTS_BEFORE_BOOTBLOCK case */
void boot_with_psp_timestamp(uint64_t base_timestamp);
#endif
#endif /* AMD_CEZANNE_PSP_TRANSFER_H */

2
src/soc/amd/cezanne/smihandler.c
View File

@ -13,7 +13,7 @@
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <elog.h>
#include <soc/psp_transfer.h>
#include <psp_verstage/psp_transfer.h>
#include <soc/smi.h>
#include <soc/smu.h>
#include <soc/southbridge.h>

2
src/soc/amd/common/Makefile.inc
View File

@ -5,6 +5,8 @@ subdirs-y += fsp
subdirs-y += pi
subdirs-y += vboot
CPPFLAGS_common += -I$(src)/soc/amd/common/vboot/include
ifneq ($(V),)
OPT_DEBUG_AMDFWTOOL = --debug
endif

2
src/soc/amd/common/block/cpu/noncar/bootblock.c
View File

@ -6,8 +6,8 @@
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/x86/tsc.h>
#include <psp_verstage/psp_transfer.h>
#include <soc/southbridge.h>
#include <soc/psp_transfer.h>
#include <stdint.h>
asmlinkage void bootblock_c_entry(uint64_t base_timestamp)

2
src/soc/amd/common/block/cpu/noncar/memlayout_psp_verstage.ld
View File

@ -1,8 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <memlayout.h>
#include <soc/psp_transfer.h>
#include <fmap_config.h>
#include <psp_verstage/psp_transfer.h>
#include <soc/psp_verstage_addr.h>
ENTRY(_psp_vs_start)

2
src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld
View File

@ -2,7 +2,7 @@
#include <memlayout.h>
#include <arch/header.ld>
#include <soc/psp_transfer.h>
#include <psp_verstage/psp_transfer.h>
#define EARLY_RESERVED_DRAM_START(addr) REGION_START(early_reserved_dram, addr)
#define EARLY_RESERVED_DRAM_END(addr) REGION_END(early_reserved_dram, addr)

2
src/soc/amd/common/psp_verstage/include/psp_verstage.h
View File

@ -7,7 +7,7 @@
#include <amdblocks/psp_efs.h>
#include <bl_uapp/bl_syscall_public.h>
#include <stdint.h>
#include <soc/psp_transfer.h>
#include <psp_verstage/psp_transfer.h>
#include <psp_post_code.h>
#define EMBEDDED_FW_SIGNATURE 0x55aa55aa

2
src/soc/amd/common/psp_verstage/psp_verstage.c
View File

@ -12,8 +12,8 @@
#include <fmap.h>
#include <fmap_config.h>
#include <pc80/mc146818rtc.h>
#include <psp_verstage/psp_transfer.h>
#include <soc/iomap.h>
#include <soc/psp_transfer.h>
#include <security/tpm/tspi.h>
#include <security/tpm/tss.h>
#include <security/vboot/vbnv.h>

6
src/soc/amd/picasso/include/soc/psp_transfer.h → src/soc/amd/common/vboot/include/psp_verstage/psp_transfer.h
View File

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef AMD_PICASSO_PSP_TRANSFER_H
#define AMD_PICASSO_PSP_TRANSFER_H
#ifndef AMD_COMMON_PSP_TRANSFER_H
#define AMD_COMMON_PSP_TRANSFER_H
# if (CONFIG_CMOS_RECOVERY_BYTE != 0)
# define CMOS_RECOVERY_BYTE CONFIG_CMOS_RECOVERY_BYTE
@ -60,4 +60,4 @@ void boot_with_psp_timestamp(uint64_t base_timestamp);
#endif
#endif /* AMD_PICASSO_PSP_TRANSFER_H */
#endif /* AMD_COMMON_PSP_TRANSFER_H */

2
src/soc/amd/common/vboot/transfer_buffer.c
View File

@ -4,9 +4,9 @@
#include <console/cbmem_console.h>
#include <console/console.h>
#include <pc80/mc146818rtc.h>
#include <psp_verstage/psp_transfer.h>
#include <security/vboot/vbnv.h>
#include <security/vboot/symbols.h>
#include <soc/psp_transfer.h>
#include <timestamp.h>
#include <2struct.h>

2
src/soc/amd/common/vboot/vboot_bootblock.c
View File

@ -3,7 +3,7 @@
#include <bootblock_common.h>
#include <console/console.h>
#include <cpu/x86/tsc.h>
#include <soc/psp_transfer.h>
#include <psp_verstage/psp_transfer.h>
#include <symbols.h>
#include <timestamp.h>
#include <types.h>

64
src/soc/amd/glinda/include/soc/psp_transfer.h
View File

@ -1,64 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* TODO: Update for Glinda */
#ifndef AMD_GLINDA_PSP_TRANSFER_H
#define AMD_GLINDA_PSP_TRANSFER_H
# if (CONFIG_CMOS_RECOVERY_BYTE != 0)
# define CMOS_RECOVERY_BYTE CONFIG_CMOS_RECOVERY_BYTE
# elif CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)
# error "Must set CONFIG_CMOS_RECOVERY_BYTE"
# endif
#define CMOS_RECOVERY_MAGIC_VAL 0x96
#define TRANSFER_INFO_SIZE 64
#define TIMESTAMP_BUFFER_SIZE 0x200
#define TRANSFER_MAGIC_VAL 0x50544953
/* Bit definitions for the psp_info field in the PSP transfer_info_struct */
#define PSP_INFO_PRODUCTION_MODE 0x00000001UL
#define PSP_INFO_PRODUCTION_SILICON 0x00000002UL
#define PSP_INFO_VALID 0x80000000UL
/* Area for things that would cause errors in a linker script */
#if !defined(__ASSEMBLER__)
#include <stdint.h>
struct transfer_info_struct {
uint32_t magic_val; /* Identifier */
uint32_t struct_bytes; /* Size of this structure */
uint32_t buffer_size; /* Size of the transfer buffer area */
/* Offsets from start of transfer buffer */
uint32_t workbuf_offset;
uint32_t console_offset;
uint32_t timestamp_offset;
uint32_t fmap_offset;
uint32_t unused1[5];
/* Fields reserved for the PSP */
uint64_t timestamp; /* Offset 0x30 */
uint32_t psp_unused; /* Offset 0x38 */
uint32_t psp_info; /* Offset 0x3C */
};
_Static_assert(sizeof(struct transfer_info_struct) == TRANSFER_INFO_SIZE,
"TRANSFER_INFO_SIZE is incorrect");
/* Make sure the PSP transferred information over to x86 side. */
int transfer_buffer_valid(const struct transfer_info_struct *ptr);
/* Verify vboot work buffer is valid in transfer buffer */
void verify_psp_transfer_buf(void);
/* Display the transfer block's PSP_info data */
void show_psp_transfer_info(void);
/* Replays the pre-x86 cbmem console into the x86 cbmem console */
void replay_transfer_buffer_cbmemc(void);
/* Called by bootblock_c_entry in the VBOOT_STARTS_BEFORE_BOOTBLOCK case */
void boot_with_psp_timestamp(uint64_t base_timestamp);
#endif
#endif /* AMD_GLINDA_PSP_TRANSFER_H */

64
src/soc/amd/mendocino/include/soc/psp_transfer.h
View File

@ -1,64 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* TODO: Check if this is still correct */
#ifndef AMD_MENDOCINO_PSP_TRANSFER_H
#define AMD_MENDOCINO_PSP_TRANSFER_H
# if (CONFIG_CMOS_RECOVERY_BYTE != 0)
# define CMOS_RECOVERY_BYTE CONFIG_CMOS_RECOVERY_BYTE
# elif CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)
# error "Must set CONFIG_CMOS_RECOVERY_BYTE"
# endif
#define CMOS_RECOVERY_MAGIC_VAL 0x96
#define TRANSFER_INFO_SIZE 64
#define TIMESTAMP_BUFFER_SIZE 0x200
#define TRANSFER_MAGIC_VAL 0x50544953
/* Bit definitions for the psp_info field in the PSP transfer_info_struct */
#define PSP_INFO_PRODUCTION_MODE 0x00000001UL
#define PSP_INFO_PRODUCTION_SILICON 0x00000002UL
#define PSP_INFO_VALID 0x80000000UL
/* Area for things that would cause errors in a linker script */
#if !defined(__ASSEMBLER__)
#include <stdint.h>
struct transfer_info_struct {
uint32_t magic_val; /* Identifier */
uint32_t struct_bytes; /* Size of this structure */
uint32_t buffer_size; /* Size of the transfer buffer area */
/* Offsets from start of transfer buffer */
uint32_t workbuf_offset;
uint32_t console_offset;
uint32_t timestamp_offset;
uint32_t fmap_offset;
uint32_t unused1[5];
/* Fields reserved for the PSP */
uint64_t timestamp; /* Offset 0x30 */
uint32_t psp_unused; /* Offset 0x38 */
uint32_t psp_info; /* Offset 0x3C */
};
_Static_assert(sizeof(struct transfer_info_struct) == TRANSFER_INFO_SIZE,
"TRANSFER_INFO_SIZE is incorrect");
/* Make sure the PSP transferred information over to x86 side. */
int transfer_buffer_valid(const struct transfer_info_struct *ptr);
/* Verify vboot work buffer is valid in transfer buffer */
void verify_psp_transfer_buf(void);
/* Display the transfer block's PSP_info data */
void show_psp_transfer_info(void);
/* Replays the pre-x86 cbmem console into the x86 cbmem console */
void replay_transfer_buffer_cbmemc(void);
/* Called by bootblock_c_entry in the VBOOT_STARTS_BEFORE_BOOTBLOCK case */
void boot_with_psp_timestamp(uint64_t base_timestamp);
#endif
#endif /* AMD_MENDOCINO_PSP_TRANSFER_H */

64
src/soc/amd/phoenix/include/soc/psp_transfer.h
View File

@ -1,64 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* TODO: Update for Phoenix */
#ifndef AMD_PHOENIX_PSP_TRANSFER_H
#define AMD_PHOENIX_PSP_TRANSFER_H
# if (CONFIG_CMOS_RECOVERY_BYTE != 0)
# define CMOS_RECOVERY_BYTE CONFIG_CMOS_RECOVERY_BYTE
# elif CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)
# error "Must set CONFIG_CMOS_RECOVERY_BYTE"
# endif
#define CMOS_RECOVERY_MAGIC_VAL 0x96
#define TRANSFER_INFO_SIZE 64
#define TIMESTAMP_BUFFER_SIZE 0x200
#define TRANSFER_MAGIC_VAL 0x50544953
/* Bit definitions for the psp_info field in the PSP transfer_info_struct */
#define PSP_INFO_PRODUCTION_MODE 0x00000001UL
#define PSP_INFO_PRODUCTION_SILICON 0x00000002UL
#define PSP_INFO_VALID 0x80000000UL
/* Area for things that would cause errors in a linker script */
#if !defined(__ASSEMBLER__)
#include <stdint.h>
struct transfer_info_struct {
uint32_t magic_val; /* Identifier */
uint32_t struct_bytes; /* Size of this structure */
uint32_t buffer_size; /* Size of the transfer buffer area */
/* Offsets from start of transfer buffer */
uint32_t workbuf_offset;
uint32_t console_offset;
uint32_t timestamp_offset;
uint32_t fmap_offset;
uint32_t unused1[5];
/* Fields reserved for the PSP */
uint64_t timestamp; /* Offset 0x30 */
uint32_t psp_unused; /* Offset 0x38 */
uint32_t psp_info; /* Offset 0x3C */
};
_Static_assert(sizeof(struct transfer_info_struct) == TRANSFER_INFO_SIZE,
"TRANSFER_INFO_SIZE is incorrect");
/* Make sure the PSP transferred information over to x86 side. */
int transfer_buffer_valid(const struct transfer_info_struct *ptr);
/* Verify vboot work buffer is valid in transfer buffer */
void verify_psp_transfer_buf(void);
/* Display the transfer block's PSP_info data */
void show_psp_transfer_info(void);
/* Replays the pre-x86 cbmem console into the x86 cbmem console */
void replay_transfer_buffer_cbmemc(void);
/* Called by bootblock_c_entry in the VBOOT_STARTS_BEFORE_BOOTBLOCK case */
void boot_with_psp_timestamp(uint64_t base_timestamp);
#endif
#endif /* AMD_PHOENIX_PSP_TRANSFER_H */