From 8fd78a653f812b6bf8daf4cf3191f3d32ab1d5a8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Wed, 23 Jan 2019 15:59:38 +0200 Subject: [PATCH] device/pci_ops: Move common pci_mmio_cfg.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It is expected that method of accessing PCI configuration register space via memory-mapped region is arch-agnostic. Change-Id: Ide6baa00d611953aeb324be0d3561f464395c5eb Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/31305 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Paul Menzel Reviewed-by: Aaron Durbin --- src/arch/x86/include/arch/io.h | 2 +- src/{arch/x86/include/arch => include/device}/pci_mmio_cfg.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) rename src/{arch/x86/include/arch => include/device}/pci_mmio_cfg.h (97%) diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index 4b4a178110..a2ba776f81 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -208,7 +208,7 @@ static __always_inline void write64(volatile void *addr, #define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC)) #include -#include +#include static __always_inline uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where) diff --git a/src/arch/x86/include/arch/pci_mmio_cfg.h b/src/include/device/pci_mmio_cfg.h similarity index 97% rename from src/arch/x86/include/arch/pci_mmio_cfg.h rename to src/include/device/pci_mmio_cfg.h index c660ed5332..2e2c19af48 100644 --- a/src/arch/x86/include/arch/pci_mmio_cfg.h +++ b/src/include/device/pci_mmio_cfg.h @@ -16,7 +16,9 @@ #ifndef _PCI_MMIO_CFG_H #define _PCI_MMIO_CFG_H +#include #include +#include #define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS