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soc/amd/common/block/espi: Fix typo in espi_setup_periph_channel 

ESPI_SLAVE_CHANNEL_READY is a read-only bit from the host perspective.
It is set when the eSPI peripheral has configured the channel.

We actually want to set the ESPI_SLAVE_CHANNEL_ENABLE flag. This never
caused an issue before because the peripheral channel is enabled by
default after PLTRST# is deasserted. This does fix the case where
periph_ch_en == 0. It now properly clears the enable flag.

BUG=b:188188172, b:188935533
TEST=Boot guybrush to OS, perform warm reset

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I24e0734d5652601ae9c967da528fec5e3f780991
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54883
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Raul E Rangel 2021-05-24 13:02:40 -06:00 committed by Felix Held
parent 4a2887f381
commit 8fef0b7010
1 changed files with 2 additions and 2 deletions
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4
src/soc/amd/common/block/lpc/espi_util.c
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@ -838,8 +838,8 @@ static int espi_setup_periph_channel(const struct espi_config *mb_cfg, uint32_t
{
uint32_t slave_config;
/* Peripheral channel requires BME bit to be set when enabling the channel. */
const uint32_t slave_en_mask = ESPI_SLAVE_CHANNEL_READY |
ESPI_SLAVE_PERIPH_BUS_MASTER_ENABLE;
const uint32_t slave_en_mask =
ESPI_SLAVE_CHANNEL_ENABLE | ESPI_SLAVE_PERIPH_BUS_MASTER_ENABLE;
if (espi_get_configuration(ESPI_SLAVE_PERIPH_CFG, &slave_config) == -1)
return -1;