src/include: Improve code formatting

Change-Id: Ic8ffd26e61c0c3f27872699bb6aa9c39204155b7
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16390
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

src/include/console/console.h

@@ -50,8 +50,8 @@ int console_log_level(int msg_level);
 int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
 void do_putchar(unsigned char byte);
 
-#define printk(LEVEL, fmt, args...)	\
+#define printk(LEVEL, fmt, args...) \
-	do { do_printk(LEVEL, fmt, ##args); } while(0)
+	do { do_printk(LEVEL, fmt, ##args); } while (0)
 
 #else
 static inline void console_init(void) {}

src/include/cpu/amd/model_fxx_rev.h

@@ -8,88 +8,88 @@ static inline int is_cpu_rev_a0(void)
 }
 static inline int is_cpu_pre_c0(void)
 {
-        return (cpuid_eax(1) & 0xfffef) < 0x0f48;
+	return (cpuid_eax(1) & 0xfffef) < 0x0f48;
 }
 
 static inline int is_cpu_c0(void)
 {
-        return (cpuid_eax(1) & 0xfffef) == 0x0f48;
+	return (cpuid_eax(1) & 0xfffef) == 0x0f48;
 }
 
 static inline int is_cpu_pre_b3(void)
 {
-        return (cpuid_eax(1) & 0xfffef) < 0x0f41;
+	return (cpuid_eax(1) & 0xfffef) < 0x0f41;
 }
 
 static inline int is_cpu_b3(void)
 {
-        return (cpuid_eax(1) & 0xfffef) == 0x0f41;
+	return (cpuid_eax(1) & 0xfffef) == 0x0f41;
 }
 //AMD_D0_SUPPORT
 static inline int is_cpu_pre_d0(void)
 {
-        return (cpuid_eax(1) & 0xfff0f) < 0x10f00;
+	return (cpuid_eax(1) & 0xfff0f) < 0x10f00;
 }
 
 static inline int is_cpu_d0(void)
 {
-        return (cpuid_eax(1) & 0xfff0f) == 0x10f00;
+	return (cpuid_eax(1) & 0xfff0f) == 0x10f00;
 }
 
 //AMD_E0_SUPPORT
 static inline int is_cpu_pre_e0(void)
 {
-        return (cpuid_eax(1) & 0xfff0f) < 0x20f00;
+	return (cpuid_eax(1) & 0xfff0f) < 0x20f00;
 }
 
 static inline int is_cpu_e0(void)
 {
-        return (cpuid_eax(1) & 0xfff00) == 0x20f00;
+	return (cpuid_eax(1) & 0xfff00) == 0x20f00;
 }
 
 //AMD_F0_SUPPORT
 static inline int is_cpu_pre_f0(void)
 {
-        return (cpuid_eax(1) & 0xfff0f) < 0x40f00;
+	return (cpuid_eax(1) & 0xfff0f) < 0x40f00;
 }
 
 static inline int is_cpu_f0(void)
 {
-        return (cpuid_eax(1) & 0xfff00) ==  0x40f00;
+	return (cpuid_eax(1) & 0xfff00) ==  0x40f00;
 }
 
 static inline int is_cpu_pre_f2(void)
 {
-        return (cpuid_eax(1) & 0xfff0f) <  0x40f02;
+	return (cpuid_eax(1) & 0xfff0f) <  0x40f02;
 }
 
 #ifdef __PRE_RAM__
 static inline int is_e0_later_in_bsp(int nodeid)
 {
-        uint32_t val;
+	uint32_t val;
-        uint32_t val_old;
+	uint32_t val_old;
-        int e0_later;
+	int e0_later;
 
 	if (IS_ENABLED(CONFIG_K8_REV_F_SUPPORT))
 		return 1;
 
-        if (nodeid==0) { // we don't need to do that for node 0 in core0/node0
+	if (nodeid==0) { // we don't need to do that for node 0 in core0/node0
-                return !is_cpu_pre_e0();
+		return !is_cpu_pre_e0();
-        }
+	}
-        // d0 will be treated as e0 with this methods, but the d0 nb_cfg_54 always 0
+	// d0 will be treated as e0 with this methods, but the d0 nb_cfg_54 always 0
-        device_t dev;
+	device_t dev;
-        dev = PCI_DEV(0, 0x18+nodeid,2);
+	dev = PCI_DEV(0, 0x18+nodeid,2);
-        val_old = pci_read_config32(dev, 0x80);
+	val_old = pci_read_config32(dev, 0x80);
-        val = val_old;
+	val = val_old;
-        val |= (1<<3);
+	val |= (1<<3);
-        pci_write_config32(dev, 0x80, val);
+	pci_write_config32(dev, 0x80, val);
-        val = pci_read_config32(dev, 0x80);
+	val = pci_read_config32(dev, 0x80);
-        e0_later = !!(val & (1<<3));
+	e0_later = !!(val & (1<<3));
-        if (e0_later) { // pre_e0 bit 3 always be 0 and can not be changed
+	if (e0_later) { // pre_e0 bit 3 always be 0 and can not be changed
-                pci_write_config32(dev, 0x80, val_old); // restore it
+		pci_write_config32(dev, 0x80, val_old); // restore it
-        }
+	}
 
-        return e0_later;
+	return e0_later;
 }
 
 static inline int is_cpu_f0_in_bsp(int nodeid)
@@ -100,18 +100,18 @@ static inline int is_cpu_f0_in_bsp(int nodeid)
 		return 0;
 	dev = PCI_DEV(0, 0x18+nodeid, 3);
 	dword = pci_read_config32(dev, 0xfc);
-        return (dword & 0xfff00) == 0x40f00;
+	return (dword & 0xfff00) == 0x40f00;
 }
 
 static inline int is_cpu_pre_f2_in_bsp(int nodeid)
 {
-        uint32_t dword;
+	uint32_t dword;
 	device_t dev;
 	if (!IS_ENABLED(CONFIG_K8_REV_F_SUPPORT))
 		return 1;
-        dev = PCI_DEV(0, 0x18+nodeid, 3);
+	dev = PCI_DEV(0, 0x18+nodeid, 3);
-        dword = pci_read_config32(dev, 0xfc);
+	dword = pci_read_config32(dev, 0xfc);
-        return (dword & 0xfff0f) < 0x40f02;
+	return (dword & 0xfff0f) < 0x40f02;
 }
 
 #else

src/include/cpu/x86/bist.h

@@ -4,7 +4,7 @@
 static void report_bist_failure(u32 bist)
 {
 	if (bist != 0) {
-                printk(BIOS_EMERG, "BIST failed: %08x", bist);
+		printk(BIOS_EMERG, "BIST failed: %08x", bist);
 		die("\n");
 	}
 }

src/include/cpu/x86/msr.h

@@ -25,8 +25,8 @@ typedef struct msr_struct
 
 typedef struct msrinit_struct
 {
-        unsigned index;
+	unsigned index;
-        msr_t msr;
+	msr_t msr;
 } msrinit_t;
 
 #if IS_ENABLED(CONFIG_SOC_SETS_MSRS)
@@ -39,8 +39,7 @@ static inline __attribute__((always_inline)) msr_t rdmsr(unsigned index)
 	return soc_msr_read(index);
 }
 
-static inline __attribute__((always_inline)) void wrmsr(unsigned index,
+static inline __attribute__((always_inline)) void wrmsr(unsigned index, msr_t msr)
-	msr_t msr)
 {
 	soc_msr_write(index, msr);
 }
@@ -67,8 +66,7 @@ static inline __attribute__((always_inline)) msr_t rdmsr(unsigned index)
 	return result;
 }
 
-static inline __attribute__((always_inline)) void wrmsr(unsigned index,
+static inline __attribute__((always_inline)) void wrmsr(unsigned index, msr_t msr)
-	msr_t msr)
 {
 	__asm__ __volatile__ (
 		"wrmsr"

src/include/cpu/x86/tsc.h

@@ -56,7 +56,7 @@ static inline unsigned long long rdtscll(void)
 
 static inline uint64_t tsc_to_uint64(tsc_t tstamp)
 {
-       return (((uint64_t)tstamp.hi) << 32) + tstamp.lo;
+	return (((uint64_t)tstamp.hi) << 32) + tstamp.lo;
 }
 #endif
 

src/include/reset.h

@@ -4,7 +4,7 @@
 #if CONFIG_HAVE_HARD_RESET
 void hard_reset(void);
 #else
-#define hard_reset() do {} while(0)
+#define hard_reset() do {} while (0)
 #endif
 void soft_reset(void);
 void cpu_reset(void);

src/include/smp/spinlock.h

@@ -6,12 +6,12 @@
 #else /* !CONFIG_SMP */
 
 #define DECLARE_SPIN_LOCK(x)
-#define barrier()		do {} while(0)
+#define barrier()		do {} while (0)
 #define spin_is_locked(lock)	0
-#define spin_unlock_wait(lock)	do {} while(0)
+#define spin_unlock_wait(lock)	do {} while (0)
-#define spin_lock(lock)		do {} while(0)
+#define spin_lock(lock)		do {} while (0)
-#define spin_unlock(lock)	do {} while(0)
+#define spin_unlock(lock)	do {} while (0)
-#define cpu_relax()		do {} while(0)
+#define cpu_relax()		do {} while (0)
 #endif
 
 #endif /* SMP_SPINLOCK_H */

src/include/string.h

@@ -24,7 +24,7 @@ int snprintf(char * buf, size_t size, const char *fmt, ...);
 static inline size_t strnlen(const char *src, size_t max)
 {
 	size_t i = 0;
-	while((*src++) && (i < max)) {
+	while ((*src++) && (i < max)) {
 		i++;
 	}
 	return i;
@@ -33,7 +33,7 @@ static inline size_t strnlen(const char *src, size_t max)
 static inline size_t strlen(const char *src)
 {
 	size_t i = 0;
-	while(*src++) {
+	while (*src++) {
 		i++;
 	}
 	return i;
@@ -154,15 +154,15 @@ static inline int islower(int c)
 
 static inline int toupper(int c)
 {
-        if (islower(c))
+	if (islower(c))
-                c -= 'a'-'A';
+		c -= 'a'-'A';
-        return c;
+	return c;
 }
 
 static inline int tolower(int c)
 {
-        if (isupper(c))
+	if (isupper(c))
-                c -= 'A'-'a';
+		c -= 'A'-'a';
-        return c;
+	return c;
 }
 #endif /* STRING_H */

src/include/watchdog.h

@@ -4,7 +4,7 @@
 #if CONFIG_USE_WATCHDOG_ON_BOOT
 void watchdog_off(void);
 #else
-#define watchdog_off() while(0) {}
+#define watchdog_off() while (0) {}
 #endif
 
 #endif /* WATCHDOG_H */