inteltool: add --ahci for printing AHCI registers
According to datasheets for Intel ICH/PCH, it works for chipsets from ICH7 to 9-series PCH, with PCI device address D31:F2. Change-Id: If1ddd7208108bda949b5a94894a7bf9e8bfe1e5f Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/15106 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -23,7 +23,7 @@ PREFIX ?= /usr/local
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CFLAGS ?= -O2 -g -Wall -W
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LDFLAGS += -lpci -lz
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OBJS = inteltool.o cpu.o gpio.o rootcmplx.o powermgt.o memory.o pcie.o amb.o ivy_memory.o spi.o gfx.o
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OBJS = inteltool.o cpu.o gpio.o rootcmplx.o powermgt.o memory.o pcie.o amb.o ivy_memory.o spi.o gfx.o ahci.o
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OS_ARCH = $(shell uname)
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ifeq ($(OS_ARCH), Darwin)
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@ -0,0 +1,77 @@
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/*
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* ahci.c: dump AHCI registers
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*
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* Copyright (C) 2016 Iru Cai
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of the
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* License.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <inttypes.h>
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#include "inteltool.h"
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#define NUM_SATA_PORTS 6
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#define MMIO_SIZE 0x400
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static const char *ghc_regs[] = {
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"CAP", "GHC", "IS", "PI",
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"VS", "CCC_CTL", "CCC_PORTS", "EM_LOC",
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"EM_CTL", "CAP2", "BOHC"
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};
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static const char *port_ctl_regs[] = {
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"PxCLB", "PxCLBU", "PxFB", "PxFBU",
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"PxIS", "PxIE", "PxCMD", "Reserved",
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"PxTFD", "PxSIG", "PxSSTS", "PxSCTL",
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"PxSERR", "PxSACT", "PxCI", "PxSNTF",
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"PxFBS", "PxDEVSLP", "Reserved"
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};
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#define NUM_GHC (sizeof(ghc_regs)/sizeof(ghc_regs[0]))
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#define NUM_PORTCTL (sizeof(port_ctl_regs)/sizeof(port_ctl_regs[0]))
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int print_ahci(struct pci_dev *ahci)
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{
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uint64_t mmio_phys;
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uint8_t *mmio;
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uint32_t i, j;
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if (!ahci) {
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puts("No SATA device found");
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return 0;
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}
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printf("\n============= AHCI Registers ==============\n\n");
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mmio_phys = ahci->base_addr[5] & ~0x7ULL;
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printf("ABAR = 0x%08llx (MEM)\n\n", (unsigned long long)mmio_phys);
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mmio = map_physical(mmio_phys, MMIO_SIZE);
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if (mmio == NULL) {
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perror("Error mapping MMIO");
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exit(1);
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}
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puts("Generic Host Control Registers:");
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for (i = 0; i < 0x100; i += 4) {
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printf("0x%02x: 0x%08x (%s)\n", i, *(uint32_t *)(mmio + i),
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(i / 4 < NUM_GHC) ? ghc_regs[i / 4]:"Reserved");
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}
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for (i = 0; i < NUM_SATA_PORTS; i++) {
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printf("\nPort %d Control Registers:\n", i);
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uint8_t *mmio_port = mmio + 0x100 + i * 0x80;
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for (j = 0; j < 0x80; j += 4) {
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printf("0x%03x: 0x%08x (%s)\n", 0x100+i*0x80+j, *(uint32_t *)(mmio_port + j),
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(j / 4 < NUM_PORTCTL) ? port_ctl_regs[j / 4]:"Reserved");
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}
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}
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unmap_physical((void *)mmio, MMIO_SIZE);
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return 0;
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}
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@ -215,12 +215,13 @@ void print_version(void)
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void print_usage(const char *name)
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{
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printf("usage: %s [-vh?gGrpmedPMaAsfS]\n", name);
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printf("usage: %s [-vh?gGrpmedPMaAsfSR]\n", name);
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printf("\n"
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" -v | --version: print the version\n"
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" -h | --help: print this help\n\n"
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" -s | --spi: dump southbridge spi and bios_cntrl registers\n"
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" -f | --gfx: dump graphics registers (UNSAFE: may hang system!)\n"
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" -R | --ahci: dump AHCI registers\n"
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" -g | --gpio: dump southbridge GPIO registers\n"
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" -G | --gpio-diffs: show GPIO differences from defaults\n"
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" -r | --rcba: dump southbridge RCBA registers\n"
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@ -240,7 +241,7 @@ void print_usage(const char *name)
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int main(int argc, char *argv[])
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{
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struct pci_access *pacc;
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struct pci_dev *sb = NULL, *nb, *gfx = NULL, *dev;
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struct pci_dev *sb = NULL, *nb, *gfx = NULL, *ahci = NULL, *dev;
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const char *dump_spd_file = NULL;
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int i, opt, option_index = 0;
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unsigned int id;
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@ -250,7 +251,7 @@ int main(int argc, char *argv[])
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int dump_gpios = 0, dump_mchbar = 0, dump_rcba = 0;
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int dump_pmbase = 0, dump_epbar = 0, dump_dmibar = 0;
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int dump_pciexbar = 0, dump_coremsrs = 0, dump_ambs = 0;
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int dump_spi = 0, dump_gfx = 0;
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int dump_spi = 0, dump_gfx = 0, dump_ahci = 0;
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int show_gpio_diffs = 0;
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static struct option long_options[] = {
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@ -270,10 +271,11 @@ int main(int argc, char *argv[])
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{"spd", 0, 0, 'S'},
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{"all", 0, 0, 'a'},
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{"gfx", 0, 0, 'f'},
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{"ahci", 0, 0, 'R'},
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{0, 0, 0, 0}
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};
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while ((opt = getopt_long(argc, argv, "vh?gGrpmedPMaAsfS:",
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while ((opt = getopt_long(argc, argv, "vh?gGrpmedPMaAsfRS:",
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long_options, &option_index)) != EOF) {
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switch (opt) {
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case 'v':
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@ -290,6 +292,9 @@ int main(int argc, char *argv[])
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case 'f':
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dump_gfx = 1;
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break;
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case 'R':
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dump_ahci = 1;
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break;
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case 'G':
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show_gpio_diffs = 1;
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break;
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@ -326,6 +331,7 @@ int main(int argc, char *argv[])
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dump_coremsrs = 1;
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dump_ambs = 1;
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dump_spi = 1;
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dump_ahci = 1;
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break;
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case 'A':
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dump_ambs = 1;
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@ -422,6 +428,15 @@ int main(int argc, char *argv[])
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gfx = 0;
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}
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ahci = pci_get_dev(pacc, 0, 0, 0x1f, 2);
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if (ahci) {
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pci_fill_info(ahci, PCI_FILL_IDENT|PCI_FILL_BASES|PCI_FILL_SIZES|PCI_FILL_CLASS);
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if (ahci->vendor_id != PCI_VENDOR_ID_INTEL)
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ahci = 0;
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}
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id = cpuid(1);
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/* Intel has suggested applications to display the family of a CPU as
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print_gfx(gfx);
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}
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if (dump_ahci) {
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print_ahci(ahci);
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}
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/* Clean up */
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pci_free_dev(nb);
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// pci_free_dev(sb); // TODO: glibc detected "double free or corruption"
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@ -235,4 +235,5 @@ int print_pciexbar(struct pci_dev *nb);
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int print_ambs(struct pci_dev *nb, struct pci_access *pacc);
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int print_spi(struct pci_dev *sb);
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int print_gfx(struct pci_dev *gfx);
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int print_ahci(struct pci_dev *ahci);
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void ivybridge_dump_timings(const char *dump_spd_file);
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