mb/amd/gardenia,padmelon;mb/google/kahlee: use full path of SoC's chip.h

This is taken from CB:41355

Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I10a18efb92ac0c3cad31044156e32aa6afe1d4d1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60198
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/mainboard/amd/gardenia/OemCustomize.c

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <chip.h>
+#include <soc/amd/stoneyridge/chip.h>
 #include <amdblocks/agesawrapper.h>
 
 #define DIMMS_PER_CHANNEL 2

src/mainboard/amd/padmelon/OemCustomize.c

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <chip.h>
+#include <soc/amd/stoneyridge/chip.h>
 #include <amdblocks/agesawrapper.h>
 
 #define DIMMS_PER_CHANNEL 1

src/mainboard/google/kahlee/OemCustomize.c

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <chip.h>
+#include <soc/amd/stoneyridge/chip.h>
 #include <amdblocks/agesawrapper.h>
 #include <gpio.h>
 #include <console/console.h>

src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c

@@ -2,7 +2,7 @@
 
 #include <amdblocks/agesawrapper.h>
 #include <variant/gpio.h>
-#include <chip.h>
+#include <soc/amd/stoneyridge/chip.h>
 #include <soc/pci_devs.h>
 
 static const PCIe_PORT_DESCRIPTOR PortList[] = {