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memory mapped I/O 

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1353 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Greg Watson 2004-01-22 01:03:41 +00:00
parent 9233e47d9f
commit 909472367f
1 changed files with 18 additions and 6 deletions
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24
src/config/Options.lb
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@ -547,31 +547,43 @@ define PCIC0_CFGADDR
default none default none
format "0x%x" format "0x%x"
export used export used
comment "PCI Configuration Address Register" comment "Address of PCI Configuration Address Register"
end end
define PCIC0_CFGDATA define PCIC0_CFGDATA
default none default none
format "0x%x" format "0x%x"
export used export used
comment "PCI Configuration Data Register" comment "Address of PCI Configuration Data Register"
end
define ISA_IO_BASE
default none
format "0x%x"
export used
comment "Base address of PCI/ISA I/O address range"
end
define ISA_MEM_BASE
default none
format "0x%x"
export used
comment "Base address of PCI/ISA memory address range"
end end
define PNP_CFGADDR define PNP_CFGADDR
default none default none
format "0x%x" format "0x%x"
export used export used
comment "PNP Configuration Address Register" comment "PNP Configuration Address Register offset"
end end
define PNP_CFGDATA define PNP_CFGDATA
default none default none
format "0x%x" format "0x%x"
export used export used
comment "PNP Configuration Data Register" comment "PNP Configuration Data Register offset"
end end
define UART0_IO_BASE define _IO_BASE
default none default none
format "0x%x" format "0x%x"
export used export used
comment "UART 0 base address" comment "Base address of memory mapped I/O operations"
end end
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