max77802: add header for max77802 PMIC
This adds register offsets and important values for the Maxim MAX77802 PMIC. Change-Id: I3724b82bcb235b6684d2b976876f628f1ffbed3f Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/3747 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
David Hendricks
Stefan Reinauer
parent
32450568bc
commit
90a42d83cf
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/*
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* Copyright (C) 2012 Samsung Electronics
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* Rajeshwari Shinde <rajeshwari.s@samsung.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __MAX77802_H_
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#define __MAX77802_H_
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enum {
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MAX77802_REG_PMIC_ID = 0x0,
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MAX77802_REG_PMIC_INTSRC,
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MAX77802_REG_PMIC_INT1,
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MAX77802_REG_PMIC_INT2,
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MAX77802_REG_PMIC_INT1MSK,
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MAX77802_REG_PMIC_INT2MSK,
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MAX77802_REG_PMIC_STATUS1,
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MAX77802_REG_PMIC_STATUS2,
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MAX77802_REG_PMIC_PWRON,
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MAX77802_REG_PMIC_MRSTB = 0xA,
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MAX77802_REG_PMIC_EPWRHOLD,
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MAX77802_REG_PMIC_BOOSTCTRL = 0xE,
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MAX77802_REG_PMIC_BOOSTOUT,
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MAX77802_REG_PMIC_BUCK1CTRL = 0x10,
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MAX77802_REG_PMIC_BUCK1DVS1,
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MAX77802_REG_PMIC_BUCK1DVS2,
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MAX77802_REG_PMIC_BUCK1DVS3,
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MAX77802_REG_PMIC_BUCK1DVS4,
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MAX77802_REG_PMIC_BUCK1DVS5,
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MAX77802_REG_PMIC_BUCK1DVS6,
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MAX77802_REG_PMIC_BUCK1DVS7,
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MAX77802_REG_PMIC_BUCK1DVS8,
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MAX77802_REG_PMIC_BUCK234FREQ,
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MAX77802_REG_PMIC_BUCK2CTRL1,
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MAX77802_REG_PMIC_BUCK2CTRL2,
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MAX77802_REG_PMIC_BUCK2PHTRAN,
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MAX77802_REG_PMIC_BUCK2DVS1,
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MAX77802_REG_PMIC_BUCK2DVS2,
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MAX77802_REG_PMIC_BUCK2DVS3,
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MAX77802_REG_PMIC_BUCK2DVS4,
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MAX77802_REG_PMIC_BUCK2DVS5,
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MAX77802_REG_PMIC_BUCK2DVS6,
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MAX77802_REG_PMIC_BUCK2DVS7,
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MAX77802_REG_PMIC_BUCK2DVS8,
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MAX77802_REG_PMIC_BUCK3CTRL1 = 0x27,
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MAX77802_REG_PMIC_BUCK3DVS1,
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MAX77802_REG_PMIC_BUCK3DVS2,
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MAX77802_REG_PMIC_BUCK3DVS3,
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MAX77802_REG_PMIC_BUCK3DVS4,
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MAX77802_REG_PMIC_BUCK3DVS5,
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MAX77802_REG_PMIC_BUCK3DVS6,
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MAX77802_REG_PMIC_BUCK3DVS7,
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MAX77802_REG_PMIC_BUCK3DVS8,
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MAX77802_REG_PMIC_BUCK4CTRL1 = 0x37,
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MAX77802_REG_PMIC_BUCK4DVS1,
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MAX77802_REG_PMIC_BUCK4DVS2,
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MAX77802_REG_PMIC_BUCK4DVS3,
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MAX77802_REG_PMIC_BUCK4DVS4,
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MAX77802_REG_PMIC_BUCK4DVS5,
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MAX77802_REG_PMIC_BUCK4DVS6,
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MAX77802_REG_PMIC_BUCK4DVS7,
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MAX77802_REG_PMIC_BUCK4DVS8,
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MAX77802_REG_PMIC_BUCK5CTRL1 = 0x40,
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MAX77802_REG_PMIC_BUCK5CTRL,
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MAX77802_REG_PMIC_BUCK5OUT,
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MAX77802_REG_PMIC_BUCK6CTRL = 0x44,
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MAX77802_REG_PMIC_BUCK6DVS1,
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MAX77802_REG_PMIC_BUCK6DVS2,
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MAX77802_REG_PMIC_BUCK6DVS3,
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MAX77802_REG_PMIC_BUCK6DVS4,
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MAX77802_REG_PMIC_BUCK6DVS5,
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MAX77802_REG_PMIC_BUCK6DVS6,
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MAX77802_REG_PMIC_BUCK6DVS7,
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MAX77802_REG_PMIC_BUCK6DVS8,
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MAX77802_REG_PMIC_BUCK7CTRL = 0x4E,
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MAX77802_REG_PMIC_BUCK7OUT,
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MAX77802_REG_PMIC_BUCK8CTRL = 0x51,
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MAX77802_REG_PMIC_BUCK8OUT,
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MAX77802_REG_PMIC_BUCK9CTRL = 0x54,
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MAX77802_REG_PMIC_BUCK9OUT,
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MAX77802_REG_PMIC_BUCK10CTRL = 0x57,
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MAX77802_REG_PMIC_BUCK10OUT,
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MAX77802_REG_PMIC_LDO1CTRL1 = 0x60,
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MAX77802_REG_PMIC_LDO2CTRL1,
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MAX77802_REG_PMIC_LDO3CTRL1,
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MAX77802_REG_PMIC_LDO4CTRL1,
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MAX77802_REG_PMIC_LDO5CTRL1,
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MAX77802_REG_PMIC_LDO6CTRL1,
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MAX77802_REG_PMIC_LDO7CTRL1,
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MAX77802_REG_PMIC_LDO8CTRL1,
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MAX77802_REG_PMIC_LDO9CTRL1,
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MAX77802_REG_PMIC_LDO10CTRL1,
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MAX77802_REG_PMIC_LDO11CTRL1,
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MAX77802_REG_PMIC_LDO12CTRL1,
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MAX77802_REG_PMIC_LDO13CTRL1,
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MAX77802_REG_PMIC_LDO14CTRL1,
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MAX77802_REG_PMIC_LDO15CTRL1,
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MAX77802_REG_PMIC_LDO17CTRL1 = 0x70,
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MAX77802_REG_PMIC_LDO18CTRL1,
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MAX77802_REG_PMIC_LDO19CTRL1,
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MAX77802_REG_PMIC_LDO20CTRL1,
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MAX77802_REG_PMIC_LDO21CTRL1,
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MAX77802_REG_PMIC_LDO23CTRL1 = 0x76,
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MAX77802_REG_PMIC_LDO24CTRL1,
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MAX77802_REG_PMIC_LDO25CTRL1,
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MAX77802_REG_PMIC_LDO26CTRL1,
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MAX77802_REG_PMIC_LDO27CTRL1 = 0x7A,
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MAX77802_REG_PMIC_LDO28CTRL1,
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MAX77802_REG_PMIC_LDO29CTRL1,
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MAX77802_REG_PMIC_LDO30CTRL1,
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MAX77802_REG_PMIC_LDO32CTRL1 = 0x7F,
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MAX77802_REG_PMIC_LDO33CTRL1,
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MAX77802_REG_PMIC_LDO34CTRL1,
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MAX77802_REG_PMIC_LDO35CTRL1,
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MAX77802_REG_PMIC_LDO1CTRL2 = 0x90,
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MAX77802_REG_PMIC_LDO2CTRL2,
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MAX77802_REG_PMIC_LDO3CTRL2,
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MAX77802_REG_PMIC_LDO4CTRL2,
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MAX77802_REG_PMIC_LDO5CTRL2,
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MAX77802_REG_PMIC_LDO6CTRL2 = 0x95,
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MAX77802_REG_PMIC_LDO7CTRL2,
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MAX77802_REG_PMIC_LDO8CTRL2,
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MAX77802_REG_PMIC_LDO9CTRL2,
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MAX77802_REG_PMIC_LDO10CTRL2,
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MAX77802_REG_PMIC_LDO11CTRL2,
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MAX77802_REG_PMIC_LDO12CTRL2,
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MAX77802_REG_PMIC_LDO13CTRL2,
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MAX77802_REG_PMIC_LDO14CTRL2,
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MAX77802_REG_PMIC_LDO15CTRL2,
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MAX77802_REG_PMIC_LDO17CTRL2 = 0xA0,
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MAX77802_REG_PMIC_LDO18CTRL2,
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MAX77802_REG_PMIC_LDO19CTRL2,
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MAX77802_REG_PMIC_LDO20CTRL2,
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MAX77802_REG_PMIC_LDO21CTRL2,
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MAX77802_REG_PMIC_LDO22CTRL2,
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MAX77802_REG_PMIC_LDO23CTRL2,
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MAX77802_REG_PMIC_LDO24CTRL2,
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MAX77802_REG_PMIC_LDO25CTRL2,
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MAX77802_REG_PMIC_LDO26CTRL2,
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MAX77802_REG_PMIC_LDO27CTRL2 = 0xAA,
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MAX77802_REG_PMIC_LDO28CTRL2,
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MAX77802_REG_PMIC_LDO29CTRL2,
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MAX77802_REG_PMIC_LDO30CTRL2,
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MAX77802_REG_PMIC_LDO32CTRL2 = 0xAF,
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MAX77802_REG_PMIC_LDO33CTRL2 = 0xB0,
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MAX77802_REG_PMIC_LDO34CTRL2,
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MAX77802_REG_PMIC_LDO35CTRL2,
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MAX77802_REG_PMIC_BBAT = 0xB4,
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MAX77802_REG_PMIC_32KHZ,
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MAX77802_NUM_OF_REGS,
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};
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/* I2C device address for pmic max77686 */
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#define MAX77802_I2C_ADDR (0x12 >> 1)
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enum {
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LDO_OFF = 0,
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LDO_ON,
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DIS_LDO = (0x00 << 6),
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EN_LDO = (0x3 << 6),
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};
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/* Buck1 1.0 volt value (P1.0V_AP_MIF) */
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#define MAX77802_BUCK1DVS1_1V 0x3E
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/* Buck2 1.0 volt value (P1.0V_VDD_ARM) */
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#define MAX77802_BUCK2DVS1_1V 0x40
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/* Buck3 1.0 volt value (P1.0V_VDD_INT) */
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#define MAX77802_BUCK3DVS1_1V 0x40
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/* Buck4 1.0 volt value (P1.0V_VDD_G3D) */
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#define MAX77802_BUCK4DVS1_1V 0x40
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/* Buck6 1.0 volt value (P1.0V_AP_KFC) */
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#define MAX77802_BUCK6DVS1_1V 0x3E
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/*
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* Different Bucks use different bits to control power. There are two types,
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* defined below.
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*/
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/* Type 1, works for BUCKs 1, 5, 6...10 */
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#define MAX77802_BUCK_TYPE1_ON (1 << 0)
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#define MAX77802_BUCK_TYPE1_IGNORE_PWRREQ (1 << 1)
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/* Type 2, works for BUCKs 2...4 */
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#define MAX77802_BUCK_TYPE2_ON (1 << 4)
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#define MAX77802_BUCK_TYPE2_IGNORE_PWRREQ (1 << 5)
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/* LDO35 1.2 volt value for bridge ic */
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#define MAX77802_LDO35CTRL1_1_2V (1 << 4)
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#define MAX77802_LOD35CTRL1_ON (1 << 6)
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/*
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* MAX77802_REG_PMIC_32KHZ set to 32KH CP
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* output is activated
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*/
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#define MAX77802_32KHCP_EN (1 << 1)
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/*
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* MAX77802_REG_PMIC_BBAT set to
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* Back up batery charger on and
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* limit voltage setting to 3.5v
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*/
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#define MAX77802_BBCHOSTEN (1 << 0)
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#define MAX77802_BBCVS_3_5V (3 << 3)
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#endif /* __MAX77802_H_ */
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