From 90a439384b3c145be59c25b693b95847e04cb48a Mon Sep 17 00:00:00 2001 From: Sridhar Siricilla Date: Mon, 12 Sep 2022 10:37:17 +0530 Subject: [PATCH] soc/intel/common: Update comment on HFSTS1.spi_protection_mode The patch updates comment on HFSTS1.spi_protection_mode. The spi_protection_mode indicates SPI protection status as well as EOM status (in a single staged EOM flow). Starting from TGL platform, staged EOM flow is introduced. In this flow, spi_protection_mode alone doesn't indicate the EOM status. For information on EOM status, please refer secton# 3.6.1 in doc# 612229. TEST=Build code for Gimble Signed-off-by: Sridhar Siricilla Change-Id: I19df5cfaa6d49963bbfb3f8bc692d847e58c4420 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67533 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/soc/intel/common/block/cse/cse.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index 9c75336f9e..c2c94ec3cb 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -271,12 +271,14 @@ bool cse_is_hfs1_com_soft_temp_disable(void) } /* - * TGL HFSTS1.spi_protection_mode bit replaces the previous - * `manufacturing mode (mfg_mode)` without changing the offset and purpose - * of this bit. + * Starting from TGL platform, HFSTS1.spi_protection_mode replaces mfg_mode to indicate + * SPI protection status as well as end-of-manufacturing(EOM) status where EOM flow is + * triggered in single staged operation (either through first boot with required MFIT + * configuratin or FPT /CLOSEMANUF). + * In staged manufacturing flow, spi_protection_mode alone doesn't indicate the EOM status. * - * Using HFSTS1.mfg_mode to get the SPI protection status for all PCH. - * mfg_mode = 0 means SPI protection in on. + * HFSTS1.spi_protection_mode description: + * mfg_mode = 0 means SPI protection is on. * mfg_mode = 1 means SPI is unprotected. */ bool cse_is_hfs1_spi_protected(void)