AGESA: Move S3 related SPI writes again
This is more agesawrapper-related code than CPU. Change-Id: I3058ef965a83aed1972e02f0f566f81d5dbd7adf Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10295 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
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@ -26,7 +26,6 @@ subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY16_KB) += family16kb
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romstage-y += s3_resume.c
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romstage-y += s3_resume.c
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ramstage-y += s3_resume.c
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ramstage-y += s3_resume.c
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ramstage-$(CONFIG_SPI_FLASH) += spi.c
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cpu_incs += $(src)/cpu/amd/agesa/cache_as_ram.inc
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cpu_incs += $(src)/cpu/amd/agesa/cache_as_ram.inc
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@ -34,40 +34,6 @@
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#include <northbridge/amd/agesa/BiosCallOuts.h>
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#include <northbridge/amd/agesa/BiosCallOuts.h>
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#include "s3_resume.h"
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#include "s3_resume.h"
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/* The size needs to be 4k aligned, which is the sector size of most flashes. */
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#define S3_DATA_VOLATILE_SIZE 0x6000
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#define S3_DATA_MTRR_SIZE 0x1000
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#define S3_DATA_NONVOLATILE_SIZE 0x1000
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#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) && \
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(S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE + S3_DATA_NONVOLATILE_SIZE) > CONFIG_S3_DATA_SIZE
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#error "Please increase the value of S3_DATA_SIZE"
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#endif
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static void get_s3nv_data(S3_DATA_TYPE S3DataType, u32 *pos, u32 *len)
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{
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/* FIXME: Find file from CBFS. */
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u32 s3_data = CONFIG_S3_DATA_POS;
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switch (S3DataType) {
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case S3DataTypeVolatile:
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*pos = s3_data;
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*len = S3_DATA_VOLATILE_SIZE;
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break;
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case S3DataTypeMTRR:
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*pos = s3_data + S3_DATA_VOLATILE_SIZE;
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*len = S3_DATA_MTRR_SIZE;
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break;
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case S3DataTypeNonVolatile:
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*pos = s3_data + S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE;
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*len = S3_DATA_NONVOLATILE_SIZE;
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break;
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default:
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*pos = 0;
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*len = 0;
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break;
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}
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}
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void restore_mtrr(void)
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void restore_mtrr(void)
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{
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{
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@ -173,6 +139,7 @@ static void move_stack_high_mem(void)
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#ifndef __PRE_RAM__
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#ifndef __PRE_RAM__
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/* FIXME: Why store MTRR in SPI, just use CBMEM ? */
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/* FIXME: Why store MTRR in SPI, just use CBMEM ? */
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#define S3_DATA_MTRR_SIZE 0x1000
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static u8 mtrr_store[S3_DATA_MTRR_SIZE];
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static u8 mtrr_store[S3_DATA_MTRR_SIZE];
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static void write_mtrr(u8 **p_nvram_pos, unsigned idx)
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static void write_mtrr(u8 **p_nvram_pos, unsigned idx)
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@ -33,6 +33,7 @@ u32 OemAgesaSaveS3Info (S3_DATA_TYPE S3DataType, u32 DataSize, void *Data);
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void OemAgesaGetS3Info (S3_DATA_TYPE S3DataType, u32 *DataSize, void **Data);
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void OemAgesaGetS3Info (S3_DATA_TYPE S3DataType, u32 *DataSize, void **Data);
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void OemAgesaSaveMtrr (void);
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void OemAgesaSaveMtrr (void);
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void spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len);
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void get_s3nv_data(S3_DATA_TYPE S3DataType, u32 *pos, u32 *len);
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int spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len);
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#endif
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#endif
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@ -1,49 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#include <console/console.h>
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#include <spi-generic.h>
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#include <spi_flash.h>
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#include "s3_resume.h"
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void spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len)
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{
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struct spi_flash *flash;
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spi_init();
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flash = spi_flash_probe(0, 0);
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if (!flash) {
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printk(BIOS_DEBUG, "Could not find SPI device\n");
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/* Dont make flow stop. */
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return;
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}
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flash->spi->rw = SPI_WRITE_FLAG;
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spi_claim_bus(flash->spi);
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flash->erase(flash, pos, size);
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flash->write(flash, pos, sizeof(len), &len);
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flash->write(flash, pos + sizeof(len), len, buf);
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flash->spi->rw = SPI_WRITE_FLAG;
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spi_release_bus(flash->spi);
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return;
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}
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@ -30,4 +30,7 @@ subdirs-$(CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY16_KB) += family16kb
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romstage-y += def_callouts.c agesawrapper.c eventlog.c
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romstage-y += def_callouts.c agesawrapper.c eventlog.c
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ramstage-y += def_callouts.c agesawrapper.c eventlog.c
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ramstage-y += def_callouts.c agesawrapper.c eventlog.c
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romstage-y += oem_s3.c
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ramstage-y += oem_s3.c
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endif
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endif
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@ -0,0 +1,83 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#include <spi-generic.h>
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#include <spi_flash.h>
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#include <string.h>
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#include <cpu/amd/agesa/s3_resume.h>
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/* The size needs to be 4k aligned, which is the sector size of most flashes. */
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#define S3_DATA_VOLATILE_SIZE 0x6000
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#define S3_DATA_MTRR_SIZE 0x1000
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#define S3_DATA_NONVOLATILE_SIZE 0x1000
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#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) && \
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(S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE + S3_DATA_NONVOLATILE_SIZE) > CONFIG_S3_DATA_SIZE
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#error "Please increase the value of S3_DATA_SIZE"
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#endif
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void get_s3nv_data(S3_DATA_TYPE S3DataType, u32 *pos, u32 *len)
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{
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/* FIXME: Find file from CBFS. */
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u32 s3_data = CONFIG_S3_DATA_POS;
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switch (S3DataType) {
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case S3DataTypeVolatile:
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*pos = s3_data;
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*len = S3_DATA_VOLATILE_SIZE;
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break;
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case S3DataTypeMTRR:
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*pos = s3_data + S3_DATA_VOLATILE_SIZE;
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*len = S3_DATA_MTRR_SIZE;
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break;
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case S3DataTypeNonVolatile:
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*pos = s3_data + S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE;
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*len = S3_DATA_NONVOLATILE_SIZE;
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break;
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default:
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*pos = 0;
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*len = 0;
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break;
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}
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}
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int spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len)
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{
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#if IS_ENABLED(CONFIG_SPI_FLASH)
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struct spi_flash *flash;
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spi_init();
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flash = spi_flash_probe(0, 0);
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if (!flash)
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return -1;
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flash->spi->rw = SPI_WRITE_FLAG;
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spi_claim_bus(flash->spi);
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flash->erase(flash, pos, size);
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flash->write(flash, pos, sizeof(len), &len);
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flash->write(flash, pos + sizeof(len), len, buf);
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flash->spi->rw = SPI_WRITE_FLAG;
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spi_release_bus(flash->spi);
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return 0;
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#else
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return -1;
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#endif
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}
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