[1/3] exynos5: import thermal management unit code
This simply imports the Exynos TMU driver from u-boot. It is not built and thus should not break anything. Change-Id: I7861132fbf97f864e4250ffbda1ef3843f296ddc Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/3106 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
This commit is contained in:
David Hendricks
parent
b9e6e1ab35
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90a70093b1
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/*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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* Akshay Saraswat <Akshay.s@samsung.com>
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*
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* EXYNOS - Thermal Management Unit
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <asm/arch/exynos-tmu.h>
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#include <asm/arch/power.h>
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#define TRIMINFO_RELOAD 1
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#define CORE_EN 1
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#define THERM_TRIP_EN (1 << 12)
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#define INTEN_RISE0 1
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#define INTEN_RISE1 (1 << 4)
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#define INTEN_RISE2 (1 << 8)
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#define INTEN_FALL0 (1 << 16)
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#define INTEN_FALL1 (1 << 20)
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#define INTEN_FALL2 (1 << 24)
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#define TRIM_INFO_MASK 0xff
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#define INTCLEAR_RISE0 1
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#define INTCLEAR_RISE1 (1 << 4)
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#define INTCLEAR_RISE2 (1 << 8)
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#define INTCLEAR_FALL0 (1 << 16)
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#define INTCLEAR_FALL1 (1 << 20)
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#define INTCLEAR_FALL2 (1 << 24)
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#define INTCLEARALL (INTCLEAR_RISE0 | INTCLEAR_RISE1 | \
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INTCLEAR_RISE2 | INTCLEAR_FALL0 | \
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INTCLEAR_FALL1 | INTCLEAR_FALL2)
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/* Tmeperature threshold values for various thermal events */
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struct temperature_params {
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/* minimum value in temperature code range */
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unsigned int min_val;
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/* maximum value in temperature code range */
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unsigned int max_val;
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/* temperature threshold to start warning */
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unsigned int start_warning;
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/* temperature threshold CPU tripping */
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unsigned int start_tripping;
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/* temperature threshold for HW tripping */
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unsigned int hardware_tripping;
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};
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/* Pre-defined values and thresholds for calibration of current temperature */
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struct tmu_data {
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/* pre-defined temperature thresholds */
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struct temperature_params ts;
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/* pre-defined efuse range minimum value */
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unsigned int efuse_min_value;
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/* pre-defined efuse value for temperature calibration */
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unsigned int efuse_value;
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/* pre-defined efuse range maximum value */
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unsigned int efuse_max_value;
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/* current temperature sensing slope */
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unsigned int slope;
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};
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/* TMU device specific details and status */
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struct tmu_info {
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/* base Address for the TMU */
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unsigned tmu_base;
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/* mux Address for the TMU */
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int tmu_mux;
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/* pre-defined values for calibration and thresholds */
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struct tmu_data data;
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/* value required for triminfo_25 calibration */
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unsigned int te1;
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/* value required for triminfo_85 calibration */
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unsigned int te2;
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/* TMU DC value for threshold calculation */
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int dc_value;
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/* enum value indicating status of the TMU */
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int tmu_state;
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};
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/* Global struct tmu_info variable to store init values */
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static struct tmu_info gbl_info;
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/*
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* After reading temperature code from register, compensating
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* its value and calculating celsius temperatue,
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* get current temperatue.
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*
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* @return current temperature of the chip as sensed by TMU
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*/
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int get_cur_temp(struct tmu_info *info)
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{
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int cur_temp;
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struct tmu_reg *reg = (struct tmu_reg *)info->tmu_base;
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/* Temperature code range between min 25 and max 125 */
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cur_temp = readl(®->current_temp) & 0xff;
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/* Calibrate current temperature */
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if (cur_temp)
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cur_temp = cur_temp - info->te1 + info->dc_value;
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return cur_temp;
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}
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/*
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* Monitors status of the TMU device and exynos temperature
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*
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* @param temp pointer to the current temperature value
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* @return enum tmu_status_t value, code indicating event to execute
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*/
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enum tmu_status_t tmu_monitor(int *temp)
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{
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if (gbl_info.tmu_state == TMU_STATUS_INIT)
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return -1;
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int cur_temp;
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struct tmu_data *data = &gbl_info.data;
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/* Read current temperature of the SOC */
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cur_temp = get_cur_temp(&gbl_info);
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*temp = cur_temp;
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/* Temperature code lies between min 25 and max 125 */
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if (cur_temp >= data->ts.start_tripping &&
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cur_temp <= data->ts.max_val)
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return TMU_STATUS_TRIPPED;
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else if (cur_temp >= data->ts.start_warning)
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return TMU_STATUS_WARNING;
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else if (cur_temp < data->ts.start_warning &&
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cur_temp >= data->ts.min_val)
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return TMU_STATUS_NORMAL;
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/* Temperature code does not lie between min 25 and max 125 */
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else {
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gbl_info.tmu_state = TMU_STATUS_INIT;
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debug("EXYNOS_TMU: Thermal reading failed\n");
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return -1;
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}
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return 0;
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}
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/*
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* Get TMU specific pre-defined values from FDT
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*
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* @param info pointer to the tmu_info struct
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* @param blob FDT blob
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* @return int value, 0 for success
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*/
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int get_tmu_fdt_values(struct tmu_info *info, const void *blob)
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{
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int node;
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int error = 0;
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/* Get the node from FDT for TMU */
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node = fdtdec_next_compatible(blob, 0,
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COMPAT_SAMSUNG_EXYNOS_TMU);
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if (node < 0) {
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debug("EXYNOS_TMU: No node for tmu in device tree\n");
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return -1;
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}
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/*
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* Get the pre-defined TMU specific values from FDT.
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* All of these are expected to be correct otherwise
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* miscalculation of register values in tmu_setup_parameters
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* may result in misleading current temperature.
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*/
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info->tmu_base = fdtdec_get_addr(blob, node, "reg");
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if (info->tmu_base == FDT_ADDR_T_NONE) {
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debug("%s: Missing tmu-base\n", __func__);
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return -1;
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}
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info->tmu_mux = fdtdec_get_int(blob,
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node, "samsung,mux", -1);
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error |= info->tmu_mux;
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info->data.ts.min_val = fdtdec_get_int(blob,
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node, "samsung,min-temp", -1);
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error |= info->data.ts.min_val;
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info->data.ts.max_val = fdtdec_get_int(blob,
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node, "samsung,max-temp", -1);
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error |= info->data.ts.max_val;
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info->data.ts.start_warning = fdtdec_get_int(blob,
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node, "samsung,start-warning", -1);
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error |= info->data.ts.start_warning;
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info->data.ts.start_tripping = fdtdec_get_int(blob,
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node, "samsung,start-tripping", -1);
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error |= info->data.ts.start_tripping;
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info->data.ts.hardware_tripping = fdtdec_get_int(blob,
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node, "samsung,hw-tripping", -1);
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error |= info->data.ts.hardware_tripping;
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info->data.efuse_min_value = fdtdec_get_int(blob,
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node, "samsung,efuse-min-value", -1);
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error |= info->data.efuse_min_value;
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info->data.efuse_value = fdtdec_get_int(blob,
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node, "samsung,efuse-value", -1);
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error |= info->data.efuse_value;
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info->data.efuse_max_value = fdtdec_get_int(blob,
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node, "samsung,efuse-max-value", -1);
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error |= info->data.efuse_max_value;
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info->data.slope = fdtdec_get_int(blob,
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node, "samsung,slope", -1);
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error |= info->data.slope;
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info->dc_value = fdtdec_get_int(blob,
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node, "samsung,dc-value", -1);
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error |= info->dc_value;
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if (error == -1) {
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debug("fail to get tmu node properties\n");
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return -1;
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}
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return 0;
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}
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/*
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* Calibrate and calculate threshold values and
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* enable interrupt levels
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*
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* @param info pointer to the tmu_info struct
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*/
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void tmu_setup_parameters(struct tmu_info *info)
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{
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unsigned int te_temp, con;
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unsigned int warning_code, trip_code, hwtrip_code;
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unsigned int cooling_temp;
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unsigned int rising_value;
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struct tmu_data *data = &info->data;
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struct tmu_reg *reg = (struct tmu_reg *)info->tmu_base;
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/* Must reload for using efuse value at EXYNOS */
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writel(TRIMINFO_RELOAD, ®->triminfo_control);
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/* Get the compensation parameter */
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te_temp = readl(®->triminfo);
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info->te1 = te_temp & TRIM_INFO_MASK;
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info->te2 = ((te_temp >> 8) & TRIM_INFO_MASK);
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if ((data->efuse_min_value > info->te1) ||
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(info->te1 > data->efuse_max_value)
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|| (info->te2 != 0))
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info->te1 = data->efuse_value;
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/* Get RISING & FALLING Threshold value */
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warning_code = data->ts.start_warning
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+ info->te1 - info->dc_value;
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trip_code = data->ts.start_tripping
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+ info->te1 - info->dc_value;
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hwtrip_code = data->ts.hardware_tripping
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+ info->te1 - info->dc_value;
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cooling_temp = 0;
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rising_value = ((warning_code << 8) |
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(trip_code << 16) |
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(hwtrip_code << 24));
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/* Set interrupt level */
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writel(rising_value, ®->threshold_temp_rise);
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writel(cooling_temp, ®->threshold_temp_fall);
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/*
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* Need to init all register settings after getting parameter info
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* [28:23] vref [11:8] slope - Tuning parameter
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*
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* WARNING: this slope value writes into many bits in the tmu_control
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* register, with the default FDT value of 268470274 (0x10008802)
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* we are using this essentially sets the default register setting
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* from the TRM for tmu_control.
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* TODO(bhthompson): rewrite this code such that we are not performing
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* a hard wipe of tmu_control and re verify functionality.
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*/
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writel(data->slope, ®->tmu_control);
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writel(INTCLEARALL, ®->intclear);
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/* TMU core enable */
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con = readl(®->tmu_control);
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con |= (info->tmu_mux << 20) | THERM_TRIP_EN | CORE_EN;
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writel(con, ®->tmu_control);
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/* Enable HW thermal trip */
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power_enable_hw_thermal_trip();
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/* LEV1 LEV2 interrupt enable */
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writel(INTEN_RISE1 | INTEN_RISE2, ®->inten);
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}
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/*
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* Initialize TMU device
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*
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* @param blob FDT blob
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* @return int value, 0 for success
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*/
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int tmu_init(const void *blob)
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{
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gbl_info.tmu_state = TMU_STATUS_INIT;
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if (get_tmu_fdt_values(&gbl_info, blob) < 0)
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return -1;
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tmu_setup_parameters(&gbl_info);
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gbl_info.tmu_state = TMU_STATUS_NORMAL;
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return 0;
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}
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