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mb/google/rex: Enable SaGv 

This patch overrides `SaGv` FSP-M UPD to enable SaGv feature to be
able to train memory (DIMM) at different frequencies.

On all latest Intel based platforms SaGv is expected to be enabled
to support dynamic switching of memory operating frequency.

BUG=b:267879107
TEST=Able to verify SaGv is enabled with 3 work point (0, 1 and 2)
and MRC retraining takes around ~20ms extra compared to SaGv being
disabled.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ic680bfeab4dd285c0d3916ba5e917cc12bae3284
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73534
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2023-03-07 16:34:22 +00:00
parent 04abc869ae
commit 90a825a7bc
1 changed files with 2 additions and 0 deletions
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src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
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@ -39,6 +39,8 @@ chip soc/intel/meteorlake
# Enable CNVi BT
register "cnvi_bt_core" = "true"
register "sagv" = "SAGV_ENABLED"
# Set on-board graphics as primary display
register "skip_ext_gfx_scan" = "1"