ec/google/wilco: Clear S0ix support bit at boot

To ensure the power button functions as expected in firmware ensure
that the EC is not in "S0ix supported OS" mode and expecting the
power button to be handled by the virtual button interface.

BUG=b:128409889
TEST=Verify that the power button works at the developer screen
when the system is rebooted from within Chrome OS.  Also ensure
that it works when external warm reset signal is asserted by H1.

Change-Id: Ic323515e3b8be08bac4f0f82e25f2f78c2f22833
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31903
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>

src/ec/google/wilco/Kconfig

@@ -2,6 +2,7 @@ config EC_GOOGLE_WILCO
 	bool
 	default n
 	select EC_GOOGLE_COMMON_MEC
+	select EC_ACPI
 	help
 	  Google Wilco Embedded Controller interface.
 

src/ec/google/wilco/chip.c

@@ -13,8 +13,10 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/acpi.h>
 #include <bootstate.h>
 #include <device/pnp.h>
+#include <ec/acpi/ec.h>
 #include <pc80/keyboard.h>
 #include <stdint.h>
 #include <stdlib.h>
@@ -55,6 +57,13 @@ static void wilco_ec_init(struct device *dev)
 	if (!dev->enabled)
 		return;
 
+	/* Disable S0ix support in EC RAM with ACPI EC interface */
+	if (!acpi_is_wakeup_s3()) {
+		ec_set_ports(CONFIG_EC_BASE_ACPI_COMMAND,
+			     CONFIG_EC_BASE_ACPI_DATA);
+		ec_write(EC_RAM_S0IX_SUPPORT, 0);
+	}
+
 	/* Print EC firmware information */
 	wilco_ec_print_all_info();
 

src/ec/google/wilco/commands.h

@@ -50,6 +50,11 @@ enum {
 	KB_BIOS_PROGRESS = 0xc2,
 };
 
+enum ec_ram_addr {
+	/* Indicate support for S0ix */
+	EC_RAM_S0IX_SUPPORT = 0xb8,
+};
+
 enum set_acpi_mode_cmd {
 	ACPI_OFF = 0,
 	ACPI_ON