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drivers/spi/sst.c: Add three remaining SST25*F080 chips 

Required for ACPI S3 suspend support at some motherboards.
Synchronizing with flashchips.c/h flashrom source code.

Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Change-Id: Idc63665937ab1bfdf15c4054001daa288bfdd47b
Reviewed-on: https://review.coreboot.org/c/30927
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Mike Banon 2019-01-15 03:03:16 +03:00 committed by Stefan Reinauer
parent 1e2676bf1b
commit 90af720d4e
1 changed files with 15 additions and 0 deletions
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15
src/drivers/spi/sst.c
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@ -77,6 +77,11 @@ static const struct sst_spi_flash_params sst_spi_flash_table[] = {
.nr_sectors = 256,
.name = "SST25VF080B",
.ops = &spi_flash_ops_write_ai,
},{
.idcode1 = 0x80,
.nr_sectors = 256,
.name = "SST25VF080",
.ops = &spi_flash_ops_write_ai,
},{
.idcode1 = 0x41,
.nr_sectors = 512,
@ -112,6 +117,16 @@ static const struct sst_spi_flash_params sst_spi_flash_table[] = {
.nr_sectors = 128,
.name = "SST25WF040",
.ops = &spi_flash_ops_write_ai,
},{
.idcode1 = 0x05,
.nr_sectors = 256,
.name = "SST25WF080",
.ops = &spi_flash_ops_write_ai,
},{
.idcode1 = 0x14,
.nr_sectors = 256,
.name = "SST25WF080B",
.ops = &spi_flash_ops_write_ai,
},
};