vendorcode/amd/pi/00670F00: Transfer TP_Perf_STRUCT to AGESA.h
Google is creating code to measure AGESA performance, which needs structure TP_Perf_STRUCT and associated definitions. In preparation to remove IDS headers, move the necessary definitions to AGESA.h. BUG=b:112885948 TEST=Build grunt Change-Id: I941a67a8889a9dbf35c9fd511c7f670623204134 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/28369 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Richard Spiegel
Martin Roth
parent
328ff7dee0
commit
90b3149deb
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@ -3581,6 +3581,125 @@ typedef enum {
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#ifndef IDS_CALLOUT_INIT
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#define IDS_CALLOUT_INIT 0x01 ///< The function data of IDS callout function of initialization.
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#define IDS_PERF_VERSION 0x00010001ul //version number 0.1.0.1
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/// Time points performance function used
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/// N O T E: NEVER change below defination, any new TP MUST be appended to the end of this enum
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typedef enum {
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TP_BEGINPROCAMDINITEARLY = 0x100, ///< BeginProcAmdInitEarly
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TP_ENDPROCAMDINITEARLY = 0x101, ///< EndProcAmdInitEarly
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TP_BEGINAMDTOPOINITIALIZE = 0x102, ///< BeginAmdTopoInitialize
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TP_ENDAMDTOPOINITIALIZE = 0x103, ///< EndAmdTopoInitialize
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TP_BEGINGNBINITATEARLIER = 0x104, ///< BeginGnbInitAtEarlier
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TP_ENDGNBINITATEARLIER = 0x105, ///< EndGnbInitAtEarlier
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TP_BEGINAMDCPUEARLY = 0x106, ///< BeginAmdCpuEarly
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TP_ENDAMDCPUEARLY = 0x107, ///< EndAmdCpuEarly
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TP_BEGINGNBINITATEARLY = 0x108, ///< BeginGnbInitAtEarly
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TP_ENDGNBINITATEARLY = 0x109, ///< EndGnbInitAtEarly
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TP_BEGINPROCAMDINITENV = 0x10A, ///< BeginProcAmdInitEnv
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TP_ENDPROCAMDINITENV = 0x10B, ///< EndProcAmdInitEnv
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TP_BEGININITENV = 0x10C, ///< BeginInitEnv
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TP_ENDINITENV = 0x10D, ///< EndInitEnv
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TP_BEGINGNBINITATENV = 0x10E, ///< BeginGnbInitAtEnv
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TP_ENDGNBINITATENV = 0x10F, ///< EndGnbInitAtEnv
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TP_BEGINPROCAMDINITLATE = 0x110, ///< BeginProcAmdInitLate
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TP_ENDPROCAMDINITLATE = 0x111, ///< EndProcAmdInitLate
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TP_BEGINCREATSYSTEMTABLE = 0x112, ///< BeginCreatSystemTable
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TP_ENDCREATSYSTEMTABLE = 0x113, ///< EndCreatSystemTable
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TP_BEGINDISPATCHCPUFEATURESLATE = 0x114, ///< BeginDispatchCpuFeaturesLate
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TP_ENDDISPATCHCPUFEATURESLATE = 0x115, ///< EndDispatchCpuFeaturesLate
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TP_BEGINAMDCPULATE = 0x116, ///< BeginAmdCpuLate
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TP_ENDAMDCPULATE = 0x117, ///< EndAmdCpuLate
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TP_BEGINGNBINITATLATE = 0x118, ///< BeginGnbInitAtLate
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TP_ENDGNBINITATLATE = 0x119, ///< EndGnbInitAtLate
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TP_BEGINPROCAMDINITMID = 0x11A, ///< BeginProcAmdInitMid
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TP_ENDPROCAMDINITMID = 0x11B, ///< EndProcAmdInitMid
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TP_BEGININITMID = 0x11E, ///< BeginInitMid
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TP_ENDINITMID = 0x11F, ///< EndInitMid
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TP_BEGINGNBINITATMID = 0x120, ///< BeginGnbInitAtMid
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TP_ENDGNBINITATMID = 0x121, ///< EndGnbInitAtMid
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TP_BEGINPROCAMDINITPOST = 0x122, ///< BeginProcAmdInitPost
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TP_ENDPROCAMDINITPOST = 0x123, ///< EndProcAmdInitPost
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TP_BEGINGNBINITATPOST = 0x124, ///< BeginGnbInitAtPost
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TP_ENDGNBINITATPOST = 0x125, ///< EndGnbInitAtPost
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TP_BEGINAMDMEMAUTO = 0x126, ///< BeginAmdMemAuto
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TP_ENDAMDMEMAUTO = 0x127, ///< EndAmdMemAuto
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TP_BEGINAMDCPUPOST = 0x128, ///< BeginAmdCpuPost
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TP_ENDAMDCPUPOST = 0x129, ///< EndAmdCpuPost
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TP_BEGINGNBINITATPOSTAFTERDRAM = 0x12A, ///< BeginGnbInitAtPostAfterDram
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TP_ENDGNBINITATPOSTAFTERDRAM = 0x12B, ///< EndGnbInitAtPostAfterDram
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TP_BEGINPROCAMDINITRESET = 0x12C, ///< BeginProcAmdInitReset
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TP_ENDPROCAMDINITRESET = 0x12D, ///< EndProcAmdInitReset
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TP_BEGININITRESET = 0x12E, ///< BeginInitReset
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TP_ENDINITRESET = 0x12F, ///< EndInitReset
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TP_BEGINHTINITRESET = 0x130, ///< BeginHtInitReset
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TP_ENDHTINITRESET = 0x131, ///< EndHtInitReset
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TP_BEGINPROCAMDINITRESUME = 0x132, ///< BeginProcAmdInitResume
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TP_ENDPROCAMDINITRESUME = 0x133, ///< EndProcAmdInitResume
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TP_BEGINAMDMEMS3RESUME = 0x134, ///< BeginAmdMemS3Resume
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TP_ENDAMDMEMS3RESUME = 0x135, ///< EndAmdMemS3Resume
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TP_BEGINDISPATCHCPUFEATURESS3RESUME = 0x136, ///< BeginDispatchCpuFeaturesS3Resume
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TP_ENDDISPATCHCPUFEATURESS3RESUME = 0x137, ///< EndDispatchCpuFeaturesS3Resume
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TP_BEGINSETCORESTSCFREQSEL = 0x138, ///< BeginSetCoresTscFreqSel
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TP_ENDSETCORESTSCFREQSEL = 0x139, ///< EndSetCoresTscFreqSel
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TP_BEGINMEMFMCTMEMCLR_INIT = 0x13A, ///< BeginMemFMctMemClr_Init
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TP_ENDNMEMFMCTMEMCLR_INIT = 0x13B, ///< EndnMemFMctMemClr_Init
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TP_BEGINMEMBEFOREMEMDATAINIT = 0x13C, ///< BeginMemBeforeMemDataInit
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TP_ENDMEMBEFOREMEMDATAINIT = 0x13D, ///< EndMemBeforeMemDataInit
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TP_BEGINPROCAMDMEMAUTO = 0x13E, ///< BeginProcAmdMemAuto
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TP_ENDPROCAMDMEMAUTO = 0x13F, ///< EndProcAmdMemAuto
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TP_BEGINMEMMFLOWC32 = 0x140, ///< BeginMemMFlowC32
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TP_ENDMEMMFLOWC32 = 0x141, ///< EndMemMFlowC32
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TP_BEGINMEMINITIALIZEMCT = 0x142, ///< BeginMemInitializeMCT
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TP_ENDMEMINITIALIZEMCT = 0x143, ///< EndMemInitializeMCT
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TP_BEGINMEMSYSTEMMEMORYMAPPING = 0x144, ///< BeginMemSystemMemoryMapping
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TP_ENDMEMSYSTEMMEMORYMAPPING = 0x145, ///< EndMemSystemMemoryMapping
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TP_BEGINMEMDRAMTRAINING = 0x146, ///< BeginMemDramTraining
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TP_ENDMEMDRAMTRAINING = 0x147, ///< EndMemDramTraining
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TP_BEGINMEMOTHERTIMING = 0x148, ///< BeginMemOtherTiming
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TP_ENDMEMOTHERTIMING = 0x149, ///< EndMemOtherTiming
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TP_BEGINMEMUMAMEMTYPING = 0x14A, ///< BeginMemUMAMemTyping
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TP_ENDMEMUMAMEMTYPING = 0x14B, ///< EndMemUMAMemTyping
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TP_BEGINMEMMEMCLR = 0x14C, ///< BeginMemMemClr
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TP_ENDMEMMEMCLR = 0x14D, ///< EndMemMemClr
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TP_BEGINMEMMFLOWTN = 0x14E, ///< BeginMemMFlowTN
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TP_ENDMEMMFLOWTN = 0x14F, ///< EndMemMFlowTN
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TP_BEGINAGESAHOOKBEFOREDRAMINIT = 0x150, ///< BeginAgesaHookBeforeDramInit
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TP_ENDAGESAHOOKBEFOREDRAMINIT = 0x151, ///< EndAgesaHookBeforeDramInit
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TP_BEGINPROCMEMDRAMTRAINING = 0x152, ///< BeginProcMemDramTraining
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TP_ENDPROCMEMDRAMTRAINING = 0x153, ///< EndProcMemDramTraining
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TP_BEGINGNBINITATRTB = 0x154, ///< BeginGnbInitAtRtb
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TP_ENDGNBINITATRTB = 0x155, ///< EndGnbInitAtRtb
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TP_BEGINGNBLOADSCSDATA = 0x156, ///< BeginGnbLoadScsData
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TP_ENDGNBLOADSCSDATA = 0x157, ///< EndGnbLoadScsData
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TP_BEGINGNBPCIETRAINING = 0x158, ///< BeginGnbPcieTraining
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TP_ENDGNBPCIETRAINING = 0x159, ///< EndGnbPcieTraining
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TP_BEGINDISPATCHCPUFEATURESINITRTB = 0x15A, ///< BeginDispatchCpuFeaturesInitRtb
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TP_ENDDISPATCHCPUFEATURESINITRTB = 0x15B, ///< EndDispatchCpuFeaturesInitRtb
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TP_BEGINAMDCPUMID = 0x15C, ///< BeginAmdCpuEarly
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TP_ENDAMDCPUMID = 0x15D, ///< EndAmdCpuEarly
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TP_BEGINAMDGNBMIDLATE = 0x15E, ///< BeginAmdGnbMidLate
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TP_ENDAMDAMDGNBMIDLATE = 0x15F, ///< EndAmdGnbMidLate
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IDS_TP_END ///< End of IDS TP list
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} IDS_PERF_DATA;
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/// Data Structure of Parameters for TestPoint_TSC.
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typedef struct {
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UINT32 LineInFile; ///< Line of current time counter
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UINT64 Description; ///<Description ID
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UINT64 StartTsc; ///< The StartTimer of TestPoint_TSC
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} TestPoint_TSC;
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#define RESERVED_TP_NUMER 0x20
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#define MAX_PERFORMANCE_UNIT_NUM (IDS_TP_END - TP_BEGINPROCAMDINITEARLY + 1 + RESERVED_TP_NUMER)
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/// Data Structure of Parameters for TP_Perf_STRUCT.
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typedef struct {
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UINT32 Signature; ///< "PERF"
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UINT32 Version; ///< version
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UINT32 Index; ///< The Index of TP_Perf_STRUCT
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UINT32 TscInMhz; ///< Tsc counter in 1 mhz
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TestPoint_TSC TP[MAX_PERFORMANCE_UNIT_NUM]; ///< The TP of TP_Perf_STRUCT
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} TP_Perf_STRUCT;
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#endif
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/************************************************************************
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@ -43,106 +43,5 @@
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#include <check_for_wrapper.h>
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#ifndef _IDS_PERFORMANCE_DATA_POINT
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#define _IDS_PERFORMANCE_DATA_POINT
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#define IDS_PERF_VERSION 0x00010001ul //version number 0.1.0.1
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/// Time points performance function used
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/// N O T E: NEVER change below defination, any new TP MUST be appended to the end of this enum
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typedef enum {
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TP_BEGINPROCAMDINITEARLY = 0x100, ///< BeginProcAmdInitEarly
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TP_ENDPROCAMDINITEARLY = 0x101, ///< EndProcAmdInitEarly
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TP_BEGINAMDTOPOINITIALIZE = 0x102, ///< BeginAmdTopoInitialize
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TP_ENDAMDTOPOINITIALIZE = 0x103, ///< EndAmdTopoInitialize
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TP_BEGINGNBINITATEARLIER = 0x104, ///< BeginGnbInitAtEarlier
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TP_ENDGNBINITATEARLIER = 0x105, ///< EndGnbInitAtEarlier
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TP_BEGINAMDCPUEARLY = 0x106, ///< BeginAmdCpuEarly
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TP_ENDAMDCPUEARLY = 0x107, ///< EndAmdCpuEarly
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TP_BEGINGNBINITATEARLY = 0x108, ///< BeginGnbInitAtEarly
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TP_ENDGNBINITATEARLY = 0x109, ///< EndGnbInitAtEarly
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TP_BEGINPROCAMDINITENV = 0x10A, ///< BeginProcAmdInitEnv
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TP_ENDPROCAMDINITENV = 0x10B, ///< EndProcAmdInitEnv
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TP_BEGININITENV = 0x10C, ///< BeginInitEnv
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TP_ENDINITENV = 0x10D, ///< EndInitEnv
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TP_BEGINGNBINITATENV = 0x10E, ///< BeginGnbInitAtEnv
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TP_ENDGNBINITATENV = 0x10F, ///< EndGnbInitAtEnv
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TP_BEGINPROCAMDINITLATE = 0x110, ///< BeginProcAmdInitLate
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TP_ENDPROCAMDINITLATE = 0x111, ///< EndProcAmdInitLate
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TP_BEGINCREATSYSTEMTABLE = 0x112, ///< BeginCreatSystemTable
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TP_ENDCREATSYSTEMTABLE = 0x113, ///< EndCreatSystemTable
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TP_BEGINDISPATCHCPUFEATURESLATE = 0x114, ///< BeginDispatchCpuFeaturesLate
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TP_ENDDISPATCHCPUFEATURESLATE = 0x115, ///< EndDispatchCpuFeaturesLate
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TP_BEGINAMDCPULATE = 0x116, ///< BeginAmdCpuLate
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TP_ENDAMDCPULATE = 0x117, ///< EndAmdCpuLate
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TP_BEGINGNBINITATLATE = 0x118, ///< BeginGnbInitAtLate
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TP_ENDGNBINITATLATE = 0x119, ///< EndGnbInitAtLate
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TP_BEGINPROCAMDINITMID = 0x11A, ///< BeginProcAmdInitMid
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TP_ENDPROCAMDINITMID = 0x11B, ///< EndProcAmdInitMid
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TP_BEGININITMID = 0x11E, ///< BeginInitMid
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TP_ENDINITMID = 0x11F, ///< EndInitMid
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TP_BEGINGNBINITATMID = 0x120, ///< BeginGnbInitAtMid
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TP_ENDGNBINITATMID = 0x121, ///< EndGnbInitAtMid
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TP_BEGINPROCAMDINITPOST = 0x122, ///< BeginProcAmdInitPost
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TP_ENDPROCAMDINITPOST = 0x123, ///< EndProcAmdInitPost
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TP_BEGINGNBINITATPOST = 0x124, ///< BeginGnbInitAtPost
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TP_ENDGNBINITATPOST = 0x125, ///< EndGnbInitAtPost
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TP_BEGINAMDMEMAUTO = 0x126, ///< BeginAmdMemAuto
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TP_ENDAMDMEMAUTO = 0x127, ///< EndAmdMemAuto
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TP_BEGINAMDCPUPOST = 0x128, ///< BeginAmdCpuPost
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TP_ENDAMDCPUPOST = 0x129, ///< EndAmdCpuPost
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TP_BEGINGNBINITATPOSTAFTERDRAM = 0x12A, ///< BeginGnbInitAtPostAfterDram
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TP_ENDGNBINITATPOSTAFTERDRAM = 0x12B, ///< EndGnbInitAtPostAfterDram
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TP_BEGINPROCAMDINITRESET = 0x12C, ///< BeginProcAmdInitReset
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TP_ENDPROCAMDINITRESET = 0x12D, ///< EndProcAmdInitReset
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TP_BEGININITRESET = 0x12E, ///< BeginInitReset
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TP_ENDINITRESET = 0x12F, ///< EndInitReset
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TP_BEGINHTINITRESET = 0x130, ///< BeginHtInitReset
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TP_ENDHTINITRESET = 0x131, ///< EndHtInitReset
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TP_BEGINPROCAMDINITRESUME = 0x132, ///< BeginProcAmdInitResume
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TP_ENDPROCAMDINITRESUME = 0x133, ///< EndProcAmdInitResume
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TP_BEGINAMDMEMS3RESUME = 0x134, ///< BeginAmdMemS3Resume
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TP_ENDAMDMEMS3RESUME = 0x135, ///< EndAmdMemS3Resume
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TP_BEGINDISPATCHCPUFEATURESS3RESUME = 0x136, ///< BeginDispatchCpuFeaturesS3Resume
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TP_ENDDISPATCHCPUFEATURESS3RESUME = 0x137, ///< EndDispatchCpuFeaturesS3Resume
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TP_BEGINSETCORESTSCFREQSEL = 0x138, ///< BeginSetCoresTscFreqSel
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TP_ENDSETCORESTSCFREQSEL = 0x139, ///< EndSetCoresTscFreqSel
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TP_BEGINMEMFMCTMEMCLR_INIT = 0x13A, ///< BeginMemFMctMemClr_Init
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TP_ENDNMEMFMCTMEMCLR_INIT = 0x13B, ///< EndnMemFMctMemClr_Init
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TP_BEGINMEMBEFOREMEMDATAINIT = 0x13C, ///< BeginMemBeforeMemDataInit
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TP_ENDMEMBEFOREMEMDATAINIT = 0x13D, ///< EndMemBeforeMemDataInit
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TP_BEGINPROCAMDMEMAUTO = 0x13E, ///< BeginProcAmdMemAuto
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TP_ENDPROCAMDMEMAUTO = 0x13F, ///< EndProcAmdMemAuto
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TP_BEGINMEMMFLOWC32 = 0x140, ///< BeginMemMFlowC32
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TP_ENDMEMMFLOWC32 = 0x141, ///< EndMemMFlowC32
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TP_BEGINMEMINITIALIZEMCT = 0x142, ///< BeginMemInitializeMCT
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TP_ENDMEMINITIALIZEMCT = 0x143, ///< EndMemInitializeMCT
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TP_BEGINMEMSYSTEMMEMORYMAPPING = 0x144, ///< BeginMemSystemMemoryMapping
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TP_ENDMEMSYSTEMMEMORYMAPPING = 0x145, ///< EndMemSystemMemoryMapping
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TP_BEGINMEMDRAMTRAINING = 0x146, ///< BeginMemDramTraining
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TP_ENDMEMDRAMTRAINING = 0x147, ///< EndMemDramTraining
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TP_BEGINMEMOTHERTIMING = 0x148, ///< BeginMemOtherTiming
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TP_ENDMEMOTHERTIMING = 0x149, ///< EndMemOtherTiming
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TP_BEGINMEMUMAMEMTYPING = 0x14A, ///< BeginMemUMAMemTyping
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TP_ENDMEMUMAMEMTYPING = 0x14B, ///< EndMemUMAMemTyping
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TP_BEGINMEMMEMCLR = 0x14C, ///< BeginMemMemClr
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TP_ENDMEMMEMCLR = 0x14D, ///< EndMemMemClr
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TP_BEGINMEMMFLOWTN = 0x14E, ///< BeginMemMFlowTN
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TP_ENDMEMMFLOWTN = 0x14F, ///< EndMemMFlowTN
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TP_BEGINAGESAHOOKBEFOREDRAMINIT = 0x150, ///< BeginAgesaHookBeforeDramInit
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TP_ENDAGESAHOOKBEFOREDRAMINIT = 0x151, ///< EndAgesaHookBeforeDramInit
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TP_BEGINPROCMEMDRAMTRAINING = 0x152, ///< BeginProcMemDramTraining
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TP_ENDPROCMEMDRAMTRAINING = 0x153, ///< EndProcMemDramTraining
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TP_BEGINGNBINITATRTB = 0x154, ///< BeginGnbInitAtRtb
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TP_ENDGNBINITATRTB = 0x155, ///< EndGnbInitAtRtb
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TP_BEGINGNBLOADSCSDATA = 0x156, ///< BeginGnbLoadScsData
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TP_ENDGNBLOADSCSDATA = 0x157, ///< EndGnbLoadScsData
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TP_BEGINGNBPCIETRAINING = 0x158, ///< BeginGnbPcieTraining
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TP_ENDGNBPCIETRAINING = 0x159, ///< EndGnbPcieTraining
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TP_BEGINDISPATCHCPUFEATURESINITRTB = 0x15A, ///< BeginDispatchCpuFeaturesInitRtb
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TP_ENDDISPATCHCPUFEATURESINITRTB = 0x15B, ///< EndDispatchCpuFeaturesInitRtb
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TP_BEGINAMDCPUMID = 0x15C, ///< BeginAmdCpuEarly
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TP_ENDAMDCPUMID = 0x15D, ///< EndAmdCpuEarly
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TP_BEGINAMDGNBMIDLATE = 0x15E, ///< BeginAmdGnbMidLate
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TP_ENDAMDAMDGNBMIDLATE = 0x15F, ///< EndAmdGnbMidLate
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IDS_TP_END ///< End of IDS TP list
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} IDS_PERF_DATA;
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#endif
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@ -45,22 +45,4 @@
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#ifndef _IDS_LIB_H_
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#define _IDS_LIB_H_
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/// Data Structure of Parameters for TestPoint_TSC.
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typedef struct {
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UINT32 LineInFile; ///< Line of current time counter
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UINT64 Description; ///<Description ID
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UINT64 StartTsc; ///< The StartTimer of TestPoint_TSC
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} TestPoint_TSC;
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#define RESERVED_TP_NUMER 0x20
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#define MAX_PERFORMANCE_UNIT_NUM (IDS_TP_END - TP_BEGINPROCAMDINITEARLY + 1 + RESERVED_TP_NUMER)
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/// Data Structure of Parameters for TP_Perf_STRUCT.
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typedef struct {
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UINT32 Signature; ///< "PERF"
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UINT32 Version; ///< version
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UINT32 Index; ///< The Index of TP_Perf_STRUCT
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UINT32 TscInMhz; ///< Tsc counter in 1 mhz
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TestPoint_TSC TP[MAX_PERFORMANCE_UNIT_NUM]; ///< The TP of TP_Perf_STRUCT
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} TP_Perf_STRUCT;
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#endif //_IDS_LIB_H_
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