diff --git a/src/vendorcode/amd/fsp/picasso/FspGuids.h b/src/vendorcode/amd/fsp/picasso/FspGuids.h
index 64bf97c8f3..70bbe74d96 100644
--- a/src/vendorcode/amd/fsp/picasso/FspGuids.h
+++ b/src/vendorcode/amd/fsp/picasso/FspGuids.h
@@ -9,6 +9,10 @@
 		GUID_INIT(0x5fc7897a, 0x5aff, 0x4c61, \
 		0xaa, 0x7a, 0xdd, 0xcf, 0xa9, 0x18, 0x43, 0x0c)
 
+#define AMD_FSP_BERT_HOB_GUID \
+		GUID_INIT(0xa21f7ab5, 0x6a89, 0x4df2, \
+		0xb9, 0x19, 0x51, 0xad, 0x95, 0x50, 0x5b, 0xd8)
+
 #define AMD_FSP_ACPI_SSDT_HOB_GUID \
 		GUID_INIT(0x54445353, 0x4002, 0x403b, \
 		0x87, 0xE1, 0x3F, 0xEB, 0x13, 0xC5, 0x66, 0x9A)
diff --git a/src/vendorcode/amd/fsp/picasso/FspmUpd.h b/src/vendorcode/amd/fsp/picasso/FspmUpd.h
index a2da917e08..276b2fcd46 100644
--- a/src/vendorcode/amd/fsp/picasso/FspmUpd.h
+++ b/src/vendorcode/amd/fsp/picasso/FspmUpd.h
@@ -61,7 +61,10 @@ typedef struct {
 	/** Offset 0x00C8**/	uint32_t                    tseg_size;
 	/** Offset 0x00CC**/	uint8_t                     pspp_policy;
 	/** Offset 0x00CD**/	uint8_t                     audio_soundwire;
-	/** Offset 0x00CE**/	uint8_t                     UnusedUpdSpace0[50];
+	/** Offset 0x00CE**/	uint8_t                     unused8;
+	/** Offset 0x00CF**/	uint8_t                     unused9;
+	/** Offset 0x00D0**/	uint32_t                    bert_size;
+	/** Offset 0x00D4**/	uint8_t                     UnusedUpdSpace0[44];
 	/** Offset 0x0100**/	uint16_t                    Reserved100;
 	/** Offset 0x0102**/	uint16_t                    UpdTerminator;
 } FSP_M_CONFIG;
diff --git a/src/vendorcode/amd/fsp/picasso/FspsUpd.h b/src/vendorcode/amd/fsp/picasso/FspsUpd.h
index 66ea60bb7b..2dcc617a9e 100644
--- a/src/vendorcode/amd/fsp/picasso/FspsUpd.h
+++ b/src/vendorcode/amd/fsp/picasso/FspsUpd.h
@@ -44,7 +44,8 @@ typedef struct {
 	/** Offset 0x00EC**/	uint8_t                     fch_usb_early_debug_select_enable;
 	/** Offset 0x00ED**/	uint8_t                     unused8;
 	/** Offset 0x00EE**/	uint32_t                    xhci_oc_pin_select;
-	/** Offset 0x00F2**/	uint8_t                     UnusedUpdSpace0[46];
+	/** Offset 0x00F2**/	uint8_t                     xhci0_force_gen1;
+	/** Offset 0x00F3**/	uint8_t                     UnusedUpdSpace0[45];
 	/** Offset 0x0120**/	uint16_t                    UpdTerminator;
 } FSP_S_CONFIG;