soc/intel/common: Make infrastructure ready for Intel common stage files

Select all Kconfig belongs into Intel SoC Family basecode/stage files
and include required headers from include/intelbasecode/ files.

BUG=None
BRANCH=none
TEST=Code is compiling with cannonlake configurations and also booting
on cannonlake RVP.

Change-Id: Iac99b4346e8bf6e260b00be9fefede5ad7b3e778
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/25734
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Subrata Banik 2018-04-19 10:23:30 +05:30 committed by Patrick Georgi
parent 2e464cf3b0
commit 90d3b2b0c0
3 changed files with 22 additions and 0 deletions

View File

@ -11,6 +11,9 @@ source "src/soc/intel/common/block/Kconfig"
comment "Intel SoC Common PCH Code"
source "src/soc/intel/common/pch/Kconfig"
comment "Intel SoC Common coreboot stages"
source "src/soc/intel/common/basecode/Kconfig"
config DISPLAY_MTRRS
bool "MTRRs: Display the MTRR settings"
default n

View File

@ -0,0 +1,12 @@
config SOC_INTEL_COMMON_BASECODE
bool
help
Common coreboot stages for Intel platform
if SOC_INTEL_COMMON_BASECODE
comment "Intel platform Common coreboot stage files"
source "src/soc/intel/common/basecode/*/Kconfig"
source "src/soc/intel/common/basecode/*/*/Kconfig"
endif

View File

@ -0,0 +1,7 @@
ifeq ($(CONFIG_SOC_INTEL_COMMON_BASECODE),y)
subdirs-y += ./*
CPPFLAGS_common += -I$(src)/soc/intel/common/basecode/include/
endif