mb/google/brya/var/redrix: Set RFI Spread Spectrum to 6%

Set RFI Spread Spectrum to 6% for Redrix as RF team request.
The default of Spread Spectrum in FSP is 1.5%, and set 1.5% in baseboard
as default.

BUG=b:200886627
TEST=build

Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Change-Id: Id0b42446e9e46ef629b5ca8d5d29faf2d771348d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58880
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Wisley Chen 2021-11-03 12:32:34 +06:00 committed by Paul Fagerburg
parent d0cef2ac6b
commit 90d79a751b
3 changed files with 8 additions and 0 deletions

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@ -68,6 +68,9 @@ chip soc/intel/alderlake
register "PchHdaIDispLinkFrequency" = "HDA_LINKFREQ_96MHZ"
register "PchHdaIDispCodecEnable" = "1"
# FIVR RFI Spread Spectrum 1.5%
register "FivrSpreadSpectrum" = "FIVR_SS_1_5"
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |

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@ -74,6 +74,9 @@ chip soc/intel/alderlake
register "PchHdaIDispLinkFrequency" = "HDA_LINKFREQ_96MHZ"
register "PchHdaIDispCodecEnable" = "1"
# FIVR RFI Spread Spectrum 1.5%
register "FivrSpreadSpectrum" = "FIVR_SS_1_5"
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |

View File

@ -34,6 +34,8 @@ chip soc/intel/alderlake
register "SaGv" = "SaGv_Enabled"
register "CnviBtAudioOffload" = "true"
# FIVR RFI Spread Spectrum 6%
register "FivrSpreadSpectrum" = "FIVR_SS_6"
# Intel Common SoC Config
#+-------------------+---------------------------+