mb/google/nissa/var/joxer: Configure Acoustic noise mitigation
- Enable Acoustic noise mitigation - Set slow slew rate VCCIA and VCCGT to SLEW_FAST_8 - Set FastPkgCRampDisable VCCIA and VCCGT to 1 BUG=b:303533832 TEST=USE="project_joxer emerge-nissa coreboot" Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com> Change-Id: I575da55b96bf4deacec5c0992eae9930eb0745d6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78256 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Derek Huang <derekhuang@google.com>
This commit is contained in:
parent
70b517ee57
commit
90f8151271
|
@ -16,6 +16,13 @@ end
|
|||
chip soc/intel/alderlake
|
||||
register "sagv" = "SaGv_Enabled"
|
||||
|
||||
# Acoustic settings
|
||||
register "acoustic_noise_mitigation" = "1"
|
||||
register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
|
||||
register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
|
||||
register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1"
|
||||
register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1"
|
||||
|
||||
# EMMC Tx CMD Delay
|
||||
# Refer to EDS-Vol2-42.3.7.
|
||||
# [14:8] steps of delay for DDR mode, each 125ps, range: 0 - 39.
|
||||
|
|
Loading…
Reference in New Issue