soc/sifive/fu540: Simplify UART refclk calculation
clock_get_coreclk_khz() already detects whether the PLL or the input clock (hfclk) is used. Tested on HiFive Unleashed. Change-Id: I264977b0de0b81ef74a014984b6d33638ab33f4b Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/29334 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Hug <philipp@hug.cx> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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@ -17,6 +17,7 @@ bootblock-y += uart.c
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bootblock-y += clint.c
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bootblock-y += media.c
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bootblock-y += bootblock.c
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bootblock-y += clock.c
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romstage-y += uart.c
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romstage-y += clint.c
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@ -242,6 +242,7 @@ void clock_init(void)
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}
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#endif /* ENV_ROMSTAGE */
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/* Get the core clock's frequency, in KHz */
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int clock_get_coreclk_khz(void)
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{
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if (read32(&prci->coreclksel) & PRCI_CORECLK_MASK)
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@ -30,11 +30,8 @@ uintptr_t uart_platform_base(int idx)
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unsigned int uart_platform_refclk(void)
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{
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/*
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* The SiFive UART uses tlclk, which is coreclk/2 as input
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* The SiFive UART uses tlclk, which is coreclk/2, as input
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*/
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if (ENV_BOOTBLOCK)
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return 33330000 / 2;
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else
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return clock_get_coreclk_khz() * KHz / 2;
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return clock_get_coreclk_khz() * KHz / 2;
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}
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