soc/sifive/fu540: Simplify UART refclk calculation

clock_get_coreclk_khz() already detects whether the PLL or the input
clock (hfclk) is used.

Tested on HiFive Unleashed.

Change-Id: I264977b0de0b81ef74a014984b6d33638ab33f4b
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/29334
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Hug <philipp@hug.cx>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Jonathan Neuschäfer 2018-10-29 14:25:05 +01:00 committed by Patrick Georgi
parent 6fe488b45f
commit 90fd0727c7
3 changed files with 4 additions and 5 deletions

View File

@ -17,6 +17,7 @@ bootblock-y += uart.c
bootblock-y += clint.c
bootblock-y += media.c
bootblock-y += bootblock.c
bootblock-y += clock.c
romstage-y += uart.c
romstage-y += clint.c

View File

@ -242,6 +242,7 @@ void clock_init(void)
}
#endif /* ENV_ROMSTAGE */
/* Get the core clock's frequency, in KHz */
int clock_get_coreclk_khz(void)
{
if (read32(&prci->coreclksel) & PRCI_CORECLK_MASK)

View File

@ -30,11 +30,8 @@ uintptr_t uart_platform_base(int idx)
unsigned int uart_platform_refclk(void)
{
/*
* The SiFive UART uses tlclk, which is coreclk/2 as input
* The SiFive UART uses tlclk, which is coreclk/2, as input
*/
if (ENV_BOOTBLOCK)
return 33330000 / 2;
else
return clock_get_coreclk_khz() * KHz / 2;
}