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cpu/amd/agesa: Use acpi_is_wakeup() 

Change test to return true on S2 wakeup too. In S2 CPU would
have been powered down so MTRR recovery is required.

Change-Id: I6ad5fb7e32c59be7d84f28461c238c3975e1e04e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6078
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Kyösti Mälkki 2014-06-19 20:52:39 +03:00 committed by Patrick Georgi
parent c551caae56
commit 9107e53756
4 changed files with 5 additions and 20 deletions
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6
src/cpu/amd/agesa/family14/model_14_init.c
View File

@ -32,9 +32,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/amd/amdfam14.h>
#include <arch/acpi.h>
#if CONFIG_HAVE_ACPI_RESUME
#include <cpu/amd/agesa/s3_resume.h>
#endif
#define MCI_STATUS 0x401
@ -75,10 +73,8 @@ static void model_14_init(device_t dev)
msr.lo |= SYSCFG_MSR_MtrrFixDramEn;
wrmsr(SYSCFG_MSR, msr);
#if CONFIG_HAVE_ACPI_RESUME
if (acpi_slp_type == 3)
if (acpi_is_wakeup())
restore_mtrr();
#endif
x86_mtrr_check();
x86_enable_cache();

6
src/cpu/amd/agesa/family15tn/model_15_init.c
View File

@ -33,9 +33,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/amd/amdfam15.h>
#include <arch/acpi.h>
#if CONFIG_HAVE_ACPI_RESUME
#include <cpu/amd/agesa/s3_resume.h>
#endif
static void model_15_init(device_t dev)
{
@ -73,10 +71,8 @@ static void model_15_init(device_t dev)
msr.lo |= SYSCFG_MSR_MtrrFixDramEn;
wrmsr(SYSCFG_MSR, msr);
#if CONFIG_HAVE_ACPI_RESUME
if (acpi_slp_type == 3)
if (acpi_is_wakeup())
restore_mtrr();
#endif
x86_mtrr_check();
x86_enable_cache();

6
src/cpu/amd/agesa/family16kb/model_16_init.c
View File

@ -32,9 +32,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/amd/amdfam16.h>
#include <arch/acpi.h>
#if CONFIG_HAVE_ACPI_RESUME
#include <cpu/amd/agesa/s3_resume.h>
#endif
static void model_16_init(device_t dev)
{
@ -71,10 +69,8 @@ static void model_16_init(device_t dev)
msr.lo |= SYSCFG_MSR_MtrrFixDramEn;
wrmsr(SYSCFG_MSR, msr);
#if CONFIG_HAVE_ACPI_RESUME
if (acpi_slp_type == 3)
if (acpi_is_wakeup())
restore_mtrr();
#endif
x86_mtrr_check();
x86_enable_cache();

7
src/cpu/amd/agesa/s3_resume.h
View File

@ -20,8 +20,6 @@
#ifndef S3_RESUME_H
#define S3_RESUME_H
#if CONFIG_HAVE_ACPI_RESUME
/* The size needs to be 4k aligned, which is the sector size of most flashes. */
#define S3_DATA_VOLATILE_SIZE 0x6000
#define S3_DATA_MTRR_SIZE 0x1000
@ -30,7 +28,8 @@
#define S3_DATA_MTRR_POS (CONFIG_S3_DATA_POS + S3_DATA_VOLATILE_SIZE)
#define S3_DATA_NONVOLATILE_POS (CONFIG_S3_DATA_POS + S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE)
#if (S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE + S3_DATA_NONVOLATILE_SIZE) > CONFIG_S3_DATA_SIZE
#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) && \
(S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE + S3_DATA_NONVOLATILE_SIZE) > CONFIG_S3_DATA_SIZE
#error "Please increase the value of S3_DATA_SIZE"
#endif
@ -55,5 +54,3 @@ void write_mtrr(struct spi_flash *flash, u32 *p_nvram_pos, unsigned idx);
#endif
#endif
#endif