cpu/amd/agesa: Use acpi_is_wakeup()
Change test to return true on S2 wakeup too. In S2 CPU would have been powered down so MTRR recovery is required. Change-Id: I6ad5fb7e32c59be7d84f28461c238c3975e1e04e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6078 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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@ -32,9 +32,7 @@
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#include <cpu/x86/mtrr.h>
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#include <cpu/amd/amdfam14.h>
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#include <arch/acpi.h>
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#if CONFIG_HAVE_ACPI_RESUME
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#include <cpu/amd/agesa/s3_resume.h>
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#endif
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#define MCI_STATUS 0x401
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@ -75,10 +73,8 @@ static void model_14_init(device_t dev)
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msr.lo |= SYSCFG_MSR_MtrrFixDramEn;
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wrmsr(SYSCFG_MSR, msr);
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#if CONFIG_HAVE_ACPI_RESUME
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if (acpi_slp_type == 3)
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if (acpi_is_wakeup())
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restore_mtrr();
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#endif
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x86_mtrr_check();
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x86_enable_cache();
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@ -33,9 +33,7 @@
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#include <cpu/x86/mtrr.h>
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#include <cpu/amd/amdfam15.h>
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#include <arch/acpi.h>
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#if CONFIG_HAVE_ACPI_RESUME
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#include <cpu/amd/agesa/s3_resume.h>
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#endif
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static void model_15_init(device_t dev)
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{
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@ -73,10 +71,8 @@ static void model_15_init(device_t dev)
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msr.lo |= SYSCFG_MSR_MtrrFixDramEn;
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wrmsr(SYSCFG_MSR, msr);
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#if CONFIG_HAVE_ACPI_RESUME
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if (acpi_slp_type == 3)
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if (acpi_is_wakeup())
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restore_mtrr();
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#endif
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x86_mtrr_check();
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x86_enable_cache();
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@ -32,9 +32,7 @@
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#include <cpu/x86/mtrr.h>
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#include <cpu/amd/amdfam16.h>
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#include <arch/acpi.h>
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#if CONFIG_HAVE_ACPI_RESUME
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#include <cpu/amd/agesa/s3_resume.h>
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#endif
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static void model_16_init(device_t dev)
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{
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@ -71,10 +69,8 @@ static void model_16_init(device_t dev)
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msr.lo |= SYSCFG_MSR_MtrrFixDramEn;
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wrmsr(SYSCFG_MSR, msr);
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#if CONFIG_HAVE_ACPI_RESUME
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if (acpi_slp_type == 3)
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if (acpi_is_wakeup())
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restore_mtrr();
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#endif
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x86_mtrr_check();
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x86_enable_cache();
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@ -20,8 +20,6 @@
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#ifndef S3_RESUME_H
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#define S3_RESUME_H
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#if CONFIG_HAVE_ACPI_RESUME
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/* The size needs to be 4k aligned, which is the sector size of most flashes. */
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#define S3_DATA_VOLATILE_SIZE 0x6000
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#define S3_DATA_MTRR_SIZE 0x1000
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@ -30,7 +28,8 @@
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#define S3_DATA_MTRR_POS (CONFIG_S3_DATA_POS + S3_DATA_VOLATILE_SIZE)
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#define S3_DATA_NONVOLATILE_POS (CONFIG_S3_DATA_POS + S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE)
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#if (S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE + S3_DATA_NONVOLATILE_SIZE) > CONFIG_S3_DATA_SIZE
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#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) && \
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(S3_DATA_VOLATILE_SIZE + S3_DATA_MTRR_SIZE + S3_DATA_NONVOLATILE_SIZE) > CONFIG_S3_DATA_SIZE
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#error "Please increase the value of S3_DATA_SIZE"
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#endif
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@ -55,5 +54,3 @@ void write_mtrr(struct spi_flash *flash, u32 *p_nvram_pos, unsigned idx);
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#endif
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#endif
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#endif
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