Use subsystem id from devicetree.cb instead of Kconfig and move
all boards to the new config scheme. Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6421 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
parent
270a908646
commit
91321028ec
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@ -137,13 +137,6 @@ config PCI_BUS_SEGN_BITS
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int
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int
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default 0
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default 0
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x0
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x0
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config PCI_ROM_RUN
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config PCI_ROM_RUN
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bool
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bool
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default n
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default n
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@ -586,16 +586,6 @@ void pci_dev_set_resources(struct device *dev)
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pci_write_config8(dev, PCI_CACHE_LINE_SIZE, 64 >> 2);
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pci_write_config8(dev, PCI_CACHE_LINE_SIZE, 64 >> 2);
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}
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}
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unsigned __attribute__((weak)) mainboard_pci_subsystem_vendor_id(__attribute__((unused)) struct device *dev)
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{
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return CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID;
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}
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unsigned __attribute__((weak)) mainboard_pci_subsystem_device_id(__attribute__((unused)) struct device *dev)
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{
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return CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID;
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}
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void pci_dev_enable_resources(struct device *dev)
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void pci_dev_enable_resources(struct device *dev)
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{
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{
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const struct pci_operations *ops;
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const struct pci_operations *ops;
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@ -604,12 +594,11 @@ void pci_dev_enable_resources(struct device *dev)
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/* Set the subsystem vendor and device ID for mainboard devices. */
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/* Set the subsystem vendor and device ID for mainboard devices. */
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ops = ops_pci(dev);
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ops = ops_pci(dev);
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if (dev->on_mainboard && ops && ops->set_subsystem) {
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if (dev->on_mainboard && ops && ops->set_subsystem) {
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printk(BIOS_DEBUG, "%s subsystem <- %02x/%02x\n", dev_path(dev),
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printk(BIOS_DEBUG, "%s subsystem <- %04x/%04x\n",
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mainboard_pci_subsystem_vendor_id(dev),
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dev_path(dev), dev->subsystem_vendor,
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mainboard_pci_subsystem_device_id(dev));
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dev->subsystem_device);
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ops->set_subsystem(dev,
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ops->set_subsystem(dev, dev->subsystem_vendor,
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mainboard_pci_subsystem_vendor_id(dev),
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dev->subsystem_device);
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mainboard_pci_subsystem_device_id(dev));
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}
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}
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command = pci_read_config16(dev, PCI_COMMAND);
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command = pci_read_config16(dev, PCI_COMMAND);
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command |= dev->command;
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command |= dev->command;
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@ -91,14 +91,6 @@ config HEAP_SIZE
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hex
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hex
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default 0xc0000
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default 0xc0000
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x3060
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x1022
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config RAMBASE
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config RAMBASE
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hex
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hex
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default 0x200000
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default 0x200000
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@ -6,6 +6,7 @@ chip northbridge/amd/amdfam10/root_complex
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end
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end
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end
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end
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device pci_domain 0 on
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device pci_domain 0 on
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subsystemid 0x1022 0x3060 inherit
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chip northbridge/amd/amdfam10
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chip northbridge/amd/amdfam10
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device pci 18.0 on # northbridge
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device pci 18.0 on # northbridge
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chip southbridge/amd/rs780
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chip southbridge/amd/rs780
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@ -59,12 +59,4 @@ config IRQ_SLOT_COUNT
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int
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int
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default 11
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default 11
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x1022
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x3050
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endif # BOARD_AMD_DBM690T
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endif # BOARD_AMD_DBM690T
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@ -15,6 +15,7 @@ chip northbridge/amd/amdk8/root_complex
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end
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end
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end
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end
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device pci_domain 0 on
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device pci_domain 0 on
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subsystemid 0x1022 0x3050 inherit
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chip northbridge/amd/amdk8
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chip northbridge/amd/amdk8
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device pci 18.0 on # southbridge
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device pci 18.0 on # southbridge
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chip southbridge/amd/rs690
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chip southbridge/amd/rs690
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@ -118,14 +118,6 @@ config ACPI_SSDTX_NUM
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int
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int
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default 0
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default 0
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x1510
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x1022
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config RAMBASE
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config RAMBASE
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hex
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hex
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default 0x200000
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default 0x200000
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@ -23,6 +23,7 @@ chip northbridge/amd/agesa_wrapper/family14/root_complex
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end
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end
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end
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end
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device pci_domain 0 on
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device pci_domain 0 on
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subsystemid 0x1022 0x1510 inherit
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chip northbridge/amd/agesa_wrapper/family14 # CPU side of HT root complex
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chip northbridge/amd/agesa_wrapper/family14 # CPU side of HT root complex
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# device pci 18.0 on # northbridge
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# device pci 18.0 on # northbridge
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chip northbridge/amd/agesa_wrapper/family14 # PCI side of HT root complex
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chip northbridge/amd/agesa_wrapper/family14 # PCI side of HT root complex
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@ -73,12 +73,4 @@ config IRQ_SLOT_COUNT
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int
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int
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default 11
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default 11
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x1022
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x3060
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endif # BOARD_AMD_MAHOGANY
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endif # BOARD_AMD_MAHOGANY
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@ -15,6 +15,7 @@ chip northbridge/amd/amdk8/root_complex
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end
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end
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end
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end
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device pci_domain 0 on
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device pci_domain 0 on
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subsystemid 0x1022 0x3060 inherit
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chip northbridge/amd/amdk8
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chip northbridge/amd/amdk8
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device pci 18.0 on # southbridge
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device pci 18.0 on # southbridge
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chip southbridge/amd/rs780
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chip southbridge/amd/rs780
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@ -79,14 +79,6 @@ config HEAP_SIZE
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hex
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hex
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default 0xc0000
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default 0xc0000
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x3060
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x1022
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config RAMBASE
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config RAMBASE
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hex
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hex
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default 0x200000
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default 0x200000
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@ -6,6 +6,7 @@ chip northbridge/amd/amdfam10/root_complex
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end
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end
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end
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end
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device pci_domain 0 on
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device pci_domain 0 on
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subsystemid 0x1022 0x3060 inherit
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chip northbridge/amd/amdfam10
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chip northbridge/amd/amdfam10
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device pci 18.0 on # northbridge
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device pci 18.0 on # northbridge
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chip southbridge/amd/rs780
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chip southbridge/amd/rs780
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@ -118,14 +118,6 @@ config ACPI_SSDTX_NUM
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int
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int
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default 0
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default 0
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x1510
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x1022
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config RAMBASE
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config RAMBASE
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hex
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hex
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default 0x200000
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default 0x200000
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@ -23,6 +23,7 @@ chip northbridge/amd/agesa_wrapper/family14/root_complex
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end
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end
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end
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end
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device pci_domain 0 on
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device pci_domain 0 on
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subsystemid 0x1022 0x1510 inherit
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chip northbridge/amd/agesa_wrapper/family14 # CPU side of HT root complex
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chip northbridge/amd/agesa_wrapper/family14 # CPU side of HT root complex
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# device pci 18.0 on # northbridge
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# device pci 18.0 on # northbridge
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chip northbridge/amd/agesa_wrapper/family14 # PCI side of HT root complex
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chip northbridge/amd/agesa_wrapper/family14 # PCI side of HT root complex
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@ -71,12 +71,4 @@ config IRQ_SLOT_COUNT
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int
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int
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default 11
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default 11
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x1022
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x3050
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endif # BOARD_AMD_PISTACHIO
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endif # BOARD_AMD_PISTACHIO
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@ -15,6 +15,7 @@ chip northbridge/amd/amdk8/root_complex
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end
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end
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end
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end
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device pci_domain 0 on
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device pci_domain 0 on
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subsystemid 0x1022 0x3050 inherit
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chip northbridge/amd/amdk8
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chip northbridge/amd/amdk8
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device pci 18.0 on # southbridge, K8 HT Configuration
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device pci 18.0 on # southbridge, K8 HT Configuration
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chip southbridge/amd/rs690
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chip southbridge/amd/rs690
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@ -82,14 +82,6 @@ config IRQ_SLOT_COUNT
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int
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int
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default 11
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default 11
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x1022
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x2b80
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config ACPI_SSDTX_NUM
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config ACPI_SSDTX_NUM
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int
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int
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default 4
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default 4
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@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex
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end
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end
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end
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end
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device pci_domain 0 on
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device pci_domain 0 on
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subsystemid 0x1022 0x2b80 inherit
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chip northbridge/amd/amdk8
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chip northbridge/amd/amdk8
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device pci 18.0 on # northbridge
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device pci 18.0 on # northbridge
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# devices on link 0, link 0 == LDT 0
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# devices on link 0, link 0 == LDT 0
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@ -84,14 +84,6 @@ config ACPI_SSDTX_NUM
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int
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int
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default 5
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default 5
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x2b80
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x1022
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config RAMBASE
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config RAMBASE
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hex
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hex
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default 0x200000
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default 0x200000
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|
@ -5,6 +5,7 @@ chip northbridge/amd/amdfam10/root_complex
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end
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end
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end
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end
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device pci_domain 0 on
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device pci_domain 0 on
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subsystemid 0x1022 0x2b80 inherit
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chip northbridge/amd/amdfam10
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chip northbridge/amd/amdfam10
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device pci 18.0 on # northbridge
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device pci 18.0 on # northbridge
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# devices on link 0, link 0 == LDT 0
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# devices on link 0, link 0 == LDT 0
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@ -79,14 +79,6 @@ config HEAP_SIZE
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hex
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hex
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default 0xc0000
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default 0xc0000
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x3060
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x1022
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config RAMBASE
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config RAMBASE
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hex
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hex
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default 0x200000
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default 0x200000
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|
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@ -6,6 +6,7 @@ chip northbridge/amd/amdfam10/root_complex
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end
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end
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||||||
end
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end
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device pci_domain 0 on
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device pci_domain 0 on
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subsystemid 0x1022 0x3060 inherit
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chip northbridge/amd/amdfam10
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chip northbridge/amd/amdfam10
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device pci 18.0 on # northbridge
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device pci 18.0 on # northbridge
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chip southbridge/amd/rs780
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chip southbridge/amd/rs780
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@ -21,14 +21,6 @@ config MAINBOARD_DIR
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string
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string
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default arima/hdama
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default arima/hdama
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x161f
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x3016
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config APIC_ID_OFFSET
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config APIC_ID_OFFSET
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hex
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hex
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default 0x0
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default 0x0
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|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex
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||||||
end
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end
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||||||
end
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end
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device pci_domain 0 on
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device pci_domain 0 on
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subsystemid 0x161f 0x3016 inherit
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chip northbridge/amd/amdk8
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chip northbridge/amd/amdk8
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device pci 18.0 on # northbridge
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device pci 18.0 on # northbridge
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# devices on link 0, link 0 == LDT 0
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# devices on link 0, link 0 == LDT 0
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||||||
|
|
|
@ -74,12 +74,4 @@ config IRQ_SLOT_COUNT
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||||||
int
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int
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default 11
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default 11
|
||||||
|
|
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x1022
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||||||
|
|
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x3060
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|
||||||
|
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||||||
endif # BOARD_ASROCK_939A785GMH
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endif # BOARD_ASROCK_939A785GMH
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|
@ -16,6 +16,7 @@ chip northbridge/amd/amdk8/root_complex
|
||||||
end
|
end
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||||||
end
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end
|
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device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x1022 0x3060 inherit
|
||||||
chip northbridge/amd/amdk8
|
chip northbridge/amd/amdk8
|
||||||
device pci 18.0 on # southbridge
|
device pci 18.0 on # southbridge
|
||||||
chip southbridge/amd/rs780
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chip southbridge/amd/rs780
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||||||
|
|
|
@ -118,14 +118,6 @@ config ACPI_SSDTX_NUM
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int
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int
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default 0
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default 0
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x1510
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|
||||||
|
|
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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|
||||||
default 0x1022
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|
||||||
|
|
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config RAMBASE
|
config RAMBASE
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hex
|
hex
|
||||||
default 0x200000
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default 0x200000
|
||||||
|
|
|
@ -23,6 +23,7 @@ chip northbridge/amd/agesa_wrapper/family14/root_complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x1022 0x1510 inherit
|
||||||
chip northbridge/amd/agesa_wrapper/family14 # CPU side of HT root complex
|
chip northbridge/amd/agesa_wrapper/family14 # CPU side of HT root complex
|
||||||
# device pci 18.0 on # northbridge
|
# device pci 18.0 on # northbridge
|
||||||
chip northbridge/amd/agesa_wrapper/family14 # PCI side of HT root complex
|
chip northbridge/amd/agesa_wrapper/family14 # PCI side of HT root complex
|
||||||
|
|
|
@ -77,8 +77,4 @@ config MAINBOARD_VENDOR
|
||||||
string
|
string
|
||||||
default "ASUS"
|
default "ASUS"
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1043
|
|
||||||
|
|
||||||
endif # VENDOR_ASUS
|
endif # VENDOR_ASUS
|
||||||
|
|
|
@ -70,12 +70,4 @@ config IRQ_SLOT_COUNT
|
||||||
int
|
int
|
||||||
default 13
|
default 13
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1043
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x815a
|
|
||||||
|
|
||||||
endif # BOARD_ASUS_A8N_E
|
endif # BOARD_ASUS_A8N_E
|
||||||
|
|
|
@ -6,6 +6,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
|
||||||
end
|
end
|
||||||
|
|
||||||
device pci_domain 0 on # PCI domain
|
device pci_domain 0 on # PCI domain
|
||||||
|
subsystemid 0x1043 0x815a inherit
|
||||||
chip northbridge/amd/amdk8 # Northbridge / RAM controller
|
chip northbridge/amd/amdk8 # Northbridge / RAM controller
|
||||||
device pci 18.0 on # Link 0 == LDT 0
|
device pci 18.0 on # Link 0 == LDT 0
|
||||||
chip southbridge/nvidia/ck804 # Southbridge
|
chip southbridge/nvidia/ck804 # Southbridge
|
||||||
|
|
|
@ -70,8 +70,4 @@ config HT_CHAIN_UNITID_BASE
|
||||||
hex
|
hex
|
||||||
default 0x0
|
default 0x0
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1043
|
|
||||||
|
|
||||||
endif # BOARD_ASUS_A8V_E_DELUXE
|
endif # BOARD_ASUS_A8V_E_DELUXE
|
||||||
|
|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on # PCI domain
|
device pci_domain 0 on # PCI domain
|
||||||
|
subsystemid 1043 0 inherit
|
||||||
chip northbridge/amd/amdk8 # mc0
|
chip northbridge/amd/amdk8 # mc0
|
||||||
device pci 18.0 on # Northbridge
|
device pci 18.0 on # Northbridge
|
||||||
# Devices on link 0, link 0 == LDT 0
|
# Devices on link 0, link 0 == LDT 0
|
||||||
|
|
|
@ -70,8 +70,4 @@ config HT_CHAIN_UNITID_BASE
|
||||||
hex
|
hex
|
||||||
default 0x0
|
default 0x0
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1043
|
|
||||||
|
|
||||||
endif # BOARD_ASUS_A8V_E_SE
|
endif # BOARD_ASUS_A8V_E_SE
|
||||||
|
|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on # PCI domain
|
device pci_domain 0 on # PCI domain
|
||||||
|
subsystemid 0x1043 0 inherit
|
||||||
chip northbridge/amd/amdk8 # mc0
|
chip northbridge/amd/amdk8 # mc0
|
||||||
device pci 18.0 on # Northbridge
|
device pci 18.0 on # Northbridge
|
||||||
# Devices on link 0, link 0 == LDT 0
|
# Devices on link 0, link 0 == LDT 0
|
||||||
|
|
|
@ -98,8 +98,4 @@ config SERIAL_CPU_INIT
|
||||||
bool
|
bool
|
||||||
default n
|
default n
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x8239
|
|
||||||
|
|
||||||
endif # BOARD_ASUS_M2N_E
|
endif # BOARD_ASUS_M2N_E
|
||||||
|
|
|
@ -25,6 +25,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on # PCI domain
|
device pci_domain 0 on # PCI domain
|
||||||
|
subsystemid 0x1043 0x8239 inherit
|
||||||
chip northbridge/amd/amdk8 # Northbridge / RAM controller
|
chip northbridge/amd/amdk8 # Northbridge / RAM controller
|
||||||
device pci 18.0 on # Link 0 == LDT 0
|
device pci 18.0 on # Link 0 == LDT 0
|
||||||
chip southbridge/nvidia/mcp55 # Southbridge
|
chip southbridge/nvidia/mcp55 # Southbridge
|
||||||
|
|
|
@ -89,8 +89,4 @@ config HT_CHAIN_END_UNITID_BASE
|
||||||
hex
|
hex
|
||||||
default 0x20
|
default 0x20
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1043
|
|
||||||
|
|
||||||
endif # BOARD_ASUS_M2V_MX_SE
|
endif # BOARD_ASUS_M2V_MX_SE
|
||||||
|
|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on # PCI domain
|
device pci_domain 0 on # PCI domain
|
||||||
|
subsystemid 0x1043 0 inherit
|
||||||
chip northbridge/amd/amdk8 # mc0
|
chip northbridge/amd/amdk8 # mc0
|
||||||
device pci 18.0 on # Northbridge
|
device pci 18.0 on # Northbridge
|
||||||
# Devices on link 0, link 0 == LDT 0
|
# Devices on link 0, link 0 == LDT 0
|
||||||
|
|
|
@ -75,10 +75,6 @@ config HT_CHAIN_UNITID_BASE
|
||||||
hex
|
hex
|
||||||
default 0x0
|
default 0x0
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1043
|
|
||||||
|
|
||||||
config IRQ_SLOT_COUNT
|
config IRQ_SLOT_COUNT
|
||||||
int
|
int
|
||||||
default 14
|
default 14
|
||||||
|
|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on # PCI domain
|
device pci_domain 0 on # PCI domain
|
||||||
|
subsystemid 0x143 0 inherit
|
||||||
chip northbridge/amd/amdk8 # mc0
|
chip northbridge/amd/amdk8 # mc0
|
||||||
device pci 18.0 on # Northbridge
|
device pci 18.0 on # Northbridge
|
||||||
# Devices on link 0, link 0 == LDT 0
|
# Devices on link 0, link 0 == LDT 0
|
||||||
|
|
|
@ -77,14 +77,6 @@ config HEAP_SIZE
|
||||||
hex
|
hex
|
||||||
default 0xc0000
|
default 0xc0000
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x83f1
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1043
|
|
||||||
|
|
||||||
config RAMBASE
|
config RAMBASE
|
||||||
hex
|
hex
|
||||||
default 0x200000
|
default 0x200000
|
||||||
|
|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdfam10/root_complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x1043 0x83f1 inherit
|
||||||
chip northbridge/amd/amdfam10
|
chip northbridge/amd/amdfam10
|
||||||
device pci 18.0 on # northbridge
|
device pci 18.0 on # northbridge
|
||||||
chip southbridge/amd/rs780
|
chip southbridge/amd/rs780
|
||||||
|
|
|
@ -78,14 +78,6 @@ config HEAP_SIZE
|
||||||
hex
|
hex
|
||||||
default 0xc0000
|
default 0xc0000
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x83a2
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1043
|
|
||||||
|
|
||||||
config RAMBASE
|
config RAMBASE
|
||||||
hex
|
hex
|
||||||
default 0x200000
|
default 0x200000
|
||||||
|
|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdfam10/root_complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x1043 0x83a2 inherit
|
||||||
chip northbridge/amd/amdfam10
|
chip northbridge/amd/amdfam10
|
||||||
device pci 18.0 on # northbridge
|
device pci 18.0 on # northbridge
|
||||||
chip southbridge/amd/rs780
|
chip southbridge/amd/rs780
|
||||||
|
|
|
@ -70,12 +70,4 @@ config IRQ_SLOT_COUNT
|
||||||
int
|
int
|
||||||
default 11
|
default 11
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x161f
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x3050
|
|
||||||
|
|
||||||
endif # BOARD_BROADCOM_BLAST
|
endif # BOARD_BROADCOM_BLAST
|
||||||
|
|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x161f 0x3050 inherit
|
||||||
chip northbridge/amd/amdk8
|
chip northbridge/amd/amdk8
|
||||||
device pci 18.0 on # northbridge
|
device pci 18.0 on # northbridge
|
||||||
# devices on link 0
|
# devices on link 0
|
||||||
|
|
|
@ -26,14 +26,6 @@ config MAINBOARD_PART_NUMBER
|
||||||
string
|
string
|
||||||
default "PowerEdge 1850"
|
default "PowerEdge 1850"
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x5580
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x15d9
|
|
||||||
|
|
||||||
config MAX_CPUS
|
config MAX_CPUS
|
||||||
int
|
int
|
||||||
default 4
|
default 4
|
||||||
|
|
|
@ -1,5 +1,6 @@
|
||||||
chip northbridge/intel/e7520 # mch
|
chip northbridge/intel/e7520 # mch
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x15d9 0x5580 inherit
|
||||||
chip southbridge/intel/i82801ex # i82801er
|
chip southbridge/intel/i82801ex # i82801er
|
||||||
# USB ports
|
# USB ports
|
||||||
device pci 1d.0 on end
|
device pci 1d.0 on end
|
||||||
|
|
|
@ -78,14 +78,6 @@ config SERIAL_CPU_INIT
|
||||||
bool
|
bool
|
||||||
default n
|
default n
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1039
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x1234
|
|
||||||
|
|
||||||
config IRQ_SLOT_COUNT
|
config IRQ_SLOT_COUNT
|
||||||
int
|
int
|
||||||
default 11
|
default 11
|
||||||
|
|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x1039 0x1234 inherit
|
||||||
chip northbridge/amd/amdk8 #mc0
|
chip northbridge/amd/amdk8 #mc0
|
||||||
device pci 18.0 on
|
device pci 18.0 on
|
||||||
# devices on link 0, link 0 == LDT 0
|
# devices on link 0, link 0 == LDT 0
|
||||||
|
|
|
@ -82,14 +82,6 @@ config SERIAL_CPU_INIT
|
||||||
bool
|
bool
|
||||||
default n
|
default n
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1022
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x2b80
|
|
||||||
|
|
||||||
config IRQ_SLOT_COUNT
|
config IRQ_SLOT_COUNT
|
||||||
int
|
int
|
||||||
default 11
|
default 11
|
||||||
|
|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on # PCI domain
|
device pci_domain 0 on # PCI domain
|
||||||
|
subsystemid 0x1022 0x2b80 inherit
|
||||||
chip northbridge/amd/amdk8 # Northbridge / RAM controller
|
chip northbridge/amd/amdk8 # Northbridge / RAM controller
|
||||||
device pci 18.0 on # Link 0 == LDT 0
|
device pci 18.0 on # Link 0 == LDT 0
|
||||||
chip southbridge/nvidia/mcp55 # Southbridge
|
chip southbridge/nvidia/mcp55 # Southbridge
|
||||||
|
|
|
@ -79,14 +79,6 @@ config HEAP_SIZE
|
||||||
hex
|
hex
|
||||||
default 0xc0000
|
default 0xc0000
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x3060
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1022
|
|
||||||
|
|
||||||
config RAMBASE
|
config RAMBASE
|
||||||
hex
|
hex
|
||||||
default 0x200000
|
default 0x200000
|
||||||
|
|
|
@ -6,6 +6,7 @@ chip northbridge/amd/amdfam10/root_complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x1022 0x3060 inherit
|
||||||
chip northbridge/amd/amdfam10
|
chip northbridge/amd/amdfam10
|
||||||
device pci 18.0 on # northbridge
|
device pci 18.0 on # northbridge
|
||||||
chip southbridge/amd/rs780
|
chip southbridge/amd/rs780
|
||||||
|
|
|
@ -79,14 +79,6 @@ config HEAP_SIZE
|
||||||
hex
|
hex
|
||||||
default 0xc0000
|
default 0xc0000
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x3060
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1022
|
|
||||||
|
|
||||||
config RAMBASE
|
config RAMBASE
|
||||||
hex
|
hex
|
||||||
default 0x200000
|
default 0x200000
|
||||||
|
|
|
@ -6,6 +6,7 @@ chip northbridge/amd/amdfam10/root_complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x3060 0x1022 inherit
|
||||||
chip northbridge/amd/amdfam10
|
chip northbridge/amd/amdfam10
|
||||||
device pci 18.0 on # northbridge
|
device pci 18.0 on # northbridge
|
||||||
chip southbridge/amd/rs780
|
chip southbridge/amd/rs780
|
||||||
|
|
|
@ -34,14 +34,6 @@ config MAINBOARD_PART_NUMBER
|
||||||
string
|
string
|
||||||
default "ProLiant DL145 G1"
|
default "ProLiant DL145 G1"
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1022
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x7460
|
|
||||||
|
|
||||||
config MAX_CPUS
|
config MAX_CPUS
|
||||||
int
|
int
|
||||||
default 4
|
default 4
|
||||||
|
|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x1022 0x7460 inherit
|
||||||
chip northbridge/amd/amdk8
|
chip northbridge/amd/amdk8
|
||||||
device pci 18.0 on end # link 0
|
device pci 18.0 on end # link 0
|
||||||
device pci 18.0 on end # link 1
|
device pci 18.0 on end # link 1
|
||||||
|
|
|
@ -79,14 +79,6 @@ config HEAP_SIZE
|
||||||
hex
|
hex
|
||||||
default 0xc0000
|
default 0xc0000
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x0000
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x0000
|
|
||||||
|
|
||||||
config RAMBASE
|
config RAMBASE
|
||||||
hex
|
hex
|
||||||
default 0x200000
|
default 0x200000
|
||||||
|
|
|
@ -32,8 +32,4 @@ config MAINBOARD_VENDOR
|
||||||
string
|
string
|
||||||
default "Intel"
|
default "Intel"
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x8086
|
|
||||||
|
|
||||||
endif # VENDOR_INTEL
|
endif # VENDOR_INTEL
|
||||||
|
|
|
@ -49,10 +49,6 @@ config MAINBOARD_PART_NUMBER
|
||||||
string
|
string
|
||||||
default "D945GCLF"
|
default "D945GCLF"
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x464C
|
|
||||||
|
|
||||||
config MMCONF_BASE_ADDRESS
|
config MMCONF_BASE_ADDRESS
|
||||||
hex
|
hex
|
||||||
default 0xf0000000
|
default 0xf0000000
|
||||||
|
|
|
@ -26,6 +26,7 @@ chip northbridge/intel/i945
|
||||||
end
|
end
|
||||||
|
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x8086 0x464c inherit
|
||||||
device pci 00.0 on end # host bridge
|
device pci 00.0 on end # host bridge
|
||||||
device pci 01.0 off end # i945 PCIe root port
|
device pci 01.0 off end # i945 PCIe root port
|
||||||
device pci 02.0 on end # vga controller
|
device pci 02.0 on end # vga controller
|
||||||
|
|
|
@ -35,14 +35,6 @@ config IRQ_SLOT_COUNT
|
||||||
int
|
int
|
||||||
default 18
|
default 18
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x8086
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x1079
|
|
||||||
|
|
||||||
config DIMM_MAP_LOGICAL
|
config DIMM_MAP_LOGICAL
|
||||||
hex
|
hex
|
||||||
default 0x0124
|
default 0x0124
|
||||||
|
|
|
@ -1,5 +1,6 @@
|
||||||
chip northbridge/intel/e7520
|
chip northbridge/intel/e7520
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x8086 0x1079 inherit
|
||||||
device pci 00.0 on end
|
device pci 00.0 on end
|
||||||
device pci 00.1 on end
|
device pci 00.1 on end
|
||||||
device pci 01.0 on end
|
device pci 01.0 on end
|
||||||
|
|
|
@ -25,14 +25,6 @@ config IRQ_SLOT_COUNT
|
||||||
int
|
int
|
||||||
default 1
|
default 1
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x8086
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x2680
|
|
||||||
|
|
||||||
config DCACHE_RAM_BASE
|
config DCACHE_RAM_BASE
|
||||||
hex
|
hex
|
||||||
default 0xffdf8000
|
default 0xffdf8000
|
||||||
|
|
|
@ -1,5 +1,6 @@
|
||||||
chip northbridge/intel/i3100
|
chip northbridge/intel/i3100
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x8086 0x2680 inherit
|
||||||
device pci 00.0 on end # IMCH
|
device pci 00.0 on end # IMCH
|
||||||
device pci 00.1 on end # IMCH error status
|
device pci 00.1 on end # IMCH error status
|
||||||
device pci 01.0 on end # IMCH EDMA engine
|
device pci 01.0 on end # IMCH EDMA engine
|
||||||
|
|
|
@ -27,14 +27,6 @@ config IRQ_SLOT_COUNT
|
||||||
int
|
int
|
||||||
default 1
|
default 1
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x8086
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x2680
|
|
||||||
|
|
||||||
config MAX_CPUS
|
config MAX_CPUS
|
||||||
int
|
int
|
||||||
default 4
|
default 4
|
||||||
|
|
|
@ -1,5 +1,6 @@
|
||||||
chip northbridge/intel/i3100
|
chip northbridge/intel/i3100
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x8086 0x2680 inherit
|
||||||
device pci 00.0 on end # IMCH
|
device pci 00.0 on end # IMCH
|
||||||
device pci 00.1 on end # IMCH error status
|
device pci 00.1 on end # IMCH error status
|
||||||
device pci 01.0 on end # IMCH EDMA engine
|
device pci 01.0 on end # IMCH EDMA engine
|
||||||
|
|
|
@ -37,12 +37,4 @@ config MAX_PHYSICAL_CPUS
|
||||||
int
|
int
|
||||||
default 2
|
default 2
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x8086
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x2480
|
|
||||||
|
|
||||||
endif # BOARD_INTEL_XE7501DEVKIT
|
endif # BOARD_INTEL_XE7501DEVKIT
|
||||||
|
|
|
@ -1,5 +1,6 @@
|
||||||
chip northbridge/intel/e7501
|
chip northbridge/intel/e7501
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x8086 0x2480 inherit
|
||||||
device pci 0.0 on end # Chipset host controller
|
device pci 0.0 on end # Chipset host controller
|
||||||
device pci 0.1 on end # Host RASUM controller
|
device pci 0.1 on end # Host RASUM controller
|
||||||
device pci 2.0 on # Hub interface B
|
device pci 2.0 on # Hub interface B
|
||||||
|
|
|
@ -63,14 +63,6 @@ config IRQ_SLOT_COUNT
|
||||||
int
|
int
|
||||||
default 11
|
default 11
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1022
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x2b80
|
|
||||||
|
|
||||||
config ACPI_SSDTX_NUM
|
config ACPI_SSDTX_NUM
|
||||||
int
|
int
|
||||||
default 5
|
default 5
|
||||||
|
|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x1022 0x2b80 inherit
|
||||||
chip northbridge/amd/amdk8
|
chip northbridge/amd/amdk8
|
||||||
device pci 18.0 on end
|
device pci 18.0 on end
|
||||||
device pci 18.0 on end
|
device pci 18.0 on end
|
||||||
|
|
|
@ -60,12 +60,4 @@ config IRQ_SLOT_COUNT
|
||||||
int
|
int
|
||||||
default 12
|
default 12
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x161f
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x3016
|
|
||||||
|
|
||||||
endif # BOARD_IWILL_DK8S2
|
endif # BOARD_IWILL_DK8S2
|
||||||
|
|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x161f 0x3016 inherit
|
||||||
chip northbridge/amd/amdk8
|
chip northbridge/amd/amdk8
|
||||||
device pci 18.0 on # LDT 0
|
device pci 18.0 on # LDT 0
|
||||||
chip southbridge/amd/amd8131
|
chip southbridge/amd/amd8131
|
||||||
|
|
|
@ -79,14 +79,6 @@ config HEAP_SIZE
|
||||||
hex
|
hex
|
||||||
default 0xc0000
|
default 0xc0000
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x3060
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1022
|
|
||||||
|
|
||||||
config RAMBASE
|
config RAMBASE
|
||||||
hex
|
hex
|
||||||
default 0x200000
|
default 0x200000
|
||||||
|
|
|
@ -6,6 +6,7 @@ chip northbridge/amd/amdfam10/root_complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x1022 0x3060 inherit
|
||||||
chip northbridge/amd/amdfam10
|
chip northbridge/amd/amdfam10
|
||||||
device pci 18.0 on # northbridge
|
device pci 18.0 on # northbridge
|
||||||
chip southbridge/amd/rs780
|
chip southbridge/amd/rs780
|
||||||
|
|
|
@ -28,14 +28,6 @@ config MAINBOARD_DIR
|
||||||
string
|
string
|
||||||
default kontron/kt690
|
default kontron/kt690
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1488
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x6900
|
|
||||||
|
|
||||||
config APIC_ID_OFFSET
|
config APIC_ID_OFFSET
|
||||||
hex
|
hex
|
||||||
default 0x0
|
default 0x0
|
||||||
|
|
|
@ -15,6 +15,7 @@ chip northbridge/amd/amdk8/root_complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x1488 0x6900 inherit
|
||||||
chip northbridge/amd/amdk8
|
chip northbridge/amd/amdk8
|
||||||
device pci 18.0 on # southbridge
|
device pci 18.0 on # southbridge
|
||||||
chip southbridge/amd/rs690
|
chip southbridge/amd/rs690
|
||||||
|
|
|
@ -22,17 +22,23 @@
|
||||||
|
|
||||||
chip northbridge/intel/i945
|
chip northbridge/intel/i945
|
||||||
|
|
||||||
device lapic_cluster 0 on
|
device lapic_cluster 0 on
|
||||||
chip cpu/intel/socket_mFCPGA478
|
chip cpu/intel/socket_mFCPGA478
|
||||||
device lapic 0 on end
|
device lapic 0 on end
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
device pci 00.0 on end # host bridge
|
device pci 00.0 on # Host bridge
|
||||||
device pci 02.0 on end # vga controller
|
subsystemid 0x17aa 0x2017
|
||||||
device pci 02.1 on end # display controller
|
end
|
||||||
chip southbridge/intel/i82801gx
|
device pci 02.0 on # VGA controller
|
||||||
|
subsystemid 0x17aa 0x201a
|
||||||
|
end
|
||||||
|
device pci 02.1 on # display controller
|
||||||
|
subsystemid 0x17aa 0x201a
|
||||||
|
end
|
||||||
|
chip southbridge/intel/i82801gx
|
||||||
register "pirqa_routing" = "0x0b"
|
register "pirqa_routing" = "0x0b"
|
||||||
register "pirqb_routing" = "0x0b"
|
register "pirqb_routing" = "0x0b"
|
||||||
register "pirqc_routing" = "0x0b"
|
register "pirqc_routing" = "0x0b"
|
||||||
|
@ -46,23 +52,36 @@ chip northbridge/intel/i945
|
||||||
# 0 No effect (default)
|
# 0 No effect (default)
|
||||||
# 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
|
# 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
|
||||||
# 2 SCI (if corresponding GPIO_EN bit is also set)
|
# 2 SCI (if corresponding GPIO_EN bit is also set)
|
||||||
register "gpi13_routing" = "2"
|
register "gpi13_routing" = "2"
|
||||||
register "gpi12_routing" = "2"
|
register "gpi12_routing" = "2"
|
||||||
register "gpi8_routing" = "2"
|
register "gpi8_routing" = "2"
|
||||||
|
|
||||||
register "sata_ahci" = "0x0"
|
register "sata_ahci" = "0x0"
|
||||||
|
|
||||||
register "gpe0_en" = "0x11000006"
|
register "gpe0_en" = "0x11000006"
|
||||||
|
|
||||||
device pci 1b.0 on end # Audio Controller
|
device pci 1b.0 on # Audio Cnotroller
|
||||||
|
subsystemid 0x17aa 0x2010
|
||||||
|
end
|
||||||
device pci 1c.0 on end # Ethernet
|
device pci 1c.0 on end # Ethernet
|
||||||
device pci 1c.1 on end # Atheros WLAN
|
device pci 1c.1 on end # Atheros WLAN
|
||||||
device pci 1d.0 on end # USB UHCI
|
device pci 1d.0 on # USB UHCI
|
||||||
device pci 1d.1 on end # USB UHCI
|
subsystemid 0x17aa 0x200a
|
||||||
device pci 1d.2 on end # USB UHCI
|
end
|
||||||
device pci 1d.3 on end # USB UHCI
|
device pci 1d.1 on # USB UHCI
|
||||||
device pci 1d.7 on end # USB2 EHCI
|
subsystemid 0x17aa 0x200a
|
||||||
|
end
|
||||||
|
device pci 1d.2 on # USB UHCI
|
||||||
|
subsystemid 0x17aa 0x200a
|
||||||
|
end
|
||||||
|
device pci 1d.3 on # USB UHCI
|
||||||
|
subsystemid 0x17aa 0x200a
|
||||||
|
end
|
||||||
|
device pci 1d.7 on # USB2 EHCI
|
||||||
|
subsystemid 0x17aa 0x200b
|
||||||
|
end
|
||||||
device pci 1f.0 on # PCI-LPC bridge
|
device pci 1f.0 on # PCI-LPC bridge
|
||||||
|
subsystemid 0x17aa 0x2009
|
||||||
chip ec/lenovo/pmh7
|
chip ec/lenovo/pmh7
|
||||||
device pnp ff.1 on # dummy
|
device pnp ff.1 on # dummy
|
||||||
end
|
end
|
||||||
|
@ -120,9 +139,15 @@ chip northbridge/intel/i945
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci 1f.1 off end # IDE
|
device pci 1f.1 off # IDE
|
||||||
device pci 1f.2 on end # SATA
|
subsystemid 0x17aa 0x200c
|
||||||
device pci 1f.3 on end # SMBus
|
end
|
||||||
|
device pci 1f.2 on # SATA
|
||||||
|
subsystemid 0x17aa 0x200d
|
||||||
|
end
|
||||||
|
device pci 1f.3 on # SMBUS
|
||||||
|
subsystemid 0x17aa 0x200f
|
||||||
|
end
|
||||||
end
|
end
|
||||||
chip southbridge/ricoh/rl5c476
|
chip southbridge/ricoh/rl5c476
|
||||||
end
|
end
|
||||||
|
|
|
@ -56,8 +56,4 @@ config MAINBOARD_VENDOR
|
||||||
string
|
string
|
||||||
default "MSI"
|
default "MSI"
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1462
|
|
||||||
|
|
||||||
endif # VENDOR_MSI
|
endif # VENDOR_MSI
|
||||||
|
|
|
@ -34,10 +34,6 @@ config MAINBOARD_PART_NUMBER
|
||||||
string
|
string
|
||||||
default "MS-7135"
|
default "MS-7135"
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x7135
|
|
||||||
|
|
||||||
config MAX_CPUS
|
config MAX_CPUS
|
||||||
int
|
int
|
||||||
default 2
|
default 2
|
||||||
|
|
|
@ -6,6 +6,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
|
||||||
end
|
end
|
||||||
|
|
||||||
device pci_domain 0 on # PCI domain
|
device pci_domain 0 on # PCI domain
|
||||||
|
subsystemid 0x1462 0x7135 inherit
|
||||||
chip northbridge/amd/amdk8 # Northbridge / RAM controller
|
chip northbridge/amd/amdk8 # Northbridge / RAM controller
|
||||||
device pci 18.0 on # Link 0 == LDT 0
|
device pci 18.0 on # Link 0 == LDT 0
|
||||||
chip southbridge/nvidia/ck804 # Southbridge
|
chip southbridge/nvidia/ck804 # Southbridge
|
||||||
|
|
|
@ -80,14 +80,6 @@ config SERIAL_CPU_INIT
|
||||||
bool
|
bool
|
||||||
default n
|
default n
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1462
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x7260
|
|
||||||
|
|
||||||
config IRQ_SLOT_COUNT
|
config IRQ_SLOT_COUNT
|
||||||
int
|
int
|
||||||
default 11
|
default 11
|
||||||
|
|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on # PCI domain
|
device pci_domain 0 on # PCI domain
|
||||||
|
subsystemid 0x1462 0x7260 inherit
|
||||||
chip northbridge/amd/amdk8 # Northbridge / RAM controller
|
chip northbridge/amd/amdk8 # Northbridge / RAM controller
|
||||||
device pci 18.0 on # Link 0 == LDT 0
|
device pci 18.0 on # Link 0 == LDT 0
|
||||||
chip southbridge/nvidia/mcp55 # Southbridge
|
chip southbridge/nvidia/mcp55 # Southbridge
|
||||||
|
|
|
@ -71,12 +71,4 @@ config IRQ_SLOT_COUNT
|
||||||
int
|
int
|
||||||
default 11
|
default 11
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1022
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x2b80
|
|
||||||
|
|
||||||
endif # BOARD_MSI_MS9185
|
endif # BOARD_MSI_MS9185
|
||||||
|
|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x1022 0x2b80 inherit
|
||||||
chip northbridge/amd/amdk8
|
chip northbridge/amd/amdk8
|
||||||
device pci 18.0 on end
|
device pci 18.0 on end
|
||||||
device pci 18.0 on end
|
device pci 18.0 on end
|
||||||
|
|
|
@ -72,14 +72,6 @@ config SERIAL_CPU_INIT
|
||||||
bool
|
bool
|
||||||
default n
|
default n
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1462
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x9282
|
|
||||||
|
|
||||||
config IRQ_SLOT_COUNT
|
config IRQ_SLOT_COUNT
|
||||||
int
|
int
|
||||||
default 11
|
default 11
|
||||||
|
|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on # PCI domain
|
device pci_domain 0 on # PCI domain
|
||||||
|
subsystemid 0x1462 0x9282 inherit
|
||||||
chip northbridge/amd/amdk8 # Northbridge / RAM controller
|
chip northbridge/amd/amdk8 # Northbridge / RAM controller
|
||||||
device pci 18.0 on # Link 0 == LDT 0
|
device pci 18.0 on # Link 0 == LDT 0
|
||||||
chip southbridge/nvidia/mcp55 # Southbridge
|
chip southbridge/nvidia/mcp55 # Southbridge
|
||||||
|
|
|
@ -87,14 +87,6 @@ config MAINBOARD_PART_NUMBER
|
||||||
string
|
string
|
||||||
default "MS-9652"
|
default "MS-9652"
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1462
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x9652
|
|
||||||
|
|
||||||
config RAMBASE
|
config RAMBASE
|
||||||
hex
|
hex
|
||||||
default 0x200000
|
default 0x200000
|
||||||
|
|
|
@ -28,6 +28,7 @@ chip northbridge/amd/amdfam10/root_complex # Root complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on # PCI domain
|
device pci_domain 0 on # PCI domain
|
||||||
|
subsystemid 0x1462 0x9652 inherit
|
||||||
chip northbridge/amd/amdfam10 # Northbridge / RAM controller
|
chip northbridge/amd/amdfam10 # Northbridge / RAM controller
|
||||||
device pci 18.0 on # Link 0
|
device pci 18.0 on # Link 0
|
||||||
chip southbridge/nvidia/mcp55 # Southbridge
|
chip southbridge/nvidia/mcp55 # Southbridge
|
||||||
|
|
|
@ -69,12 +69,4 @@ config IRQ_SLOT_COUNT
|
||||||
int
|
int
|
||||||
default 9
|
default 9
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x17c2
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x10
|
|
||||||
|
|
||||||
endif # BOARD_NEWISYS_KHEPRI
|
endif # BOARD_NEWISYS_KHEPRI
|
||||||
|
|
|
@ -6,6 +6,7 @@ chip northbridge/amd/amdk8/root_complex
|
||||||
end
|
end
|
||||||
|
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x17c2 0x0010 inherit
|
||||||
chip northbridge/amd/amdk8
|
chip northbridge/amd/amdk8
|
||||||
device pci 18.0 on end # LDT 0
|
device pci 18.0 on end # LDT 0
|
||||||
device pci 18.0 on # LDT 1
|
device pci 18.0 on # LDT 1
|
||||||
|
|
|
@ -84,14 +84,6 @@ config SERIAL_CPU_INIT
|
||||||
bool
|
bool
|
||||||
default n
|
default n
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x1022
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x2b80
|
|
||||||
|
|
||||||
config IRQ_SLOT_COUNT
|
config IRQ_SLOT_COUNT
|
||||||
int
|
int
|
||||||
default 11
|
default 11
|
||||||
|
|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on # PCI domain
|
device pci_domain 0 on # PCI domain
|
||||||
|
subsystemid 0x1022 0x2b80 inherit
|
||||||
chip northbridge/amd/amdk8 # Northbridge / RAM controller
|
chip northbridge/amd/amdk8 # Northbridge / RAM controller
|
||||||
device pci 18.0 on # Link 0 == LDT 0
|
device pci 18.0 on # Link 0 == LDT 0
|
||||||
chip southbridge/nvidia/mcp55 # Southbridge
|
chip southbridge/nvidia/mcp55 # Southbridge
|
||||||
|
|
|
@ -14,8 +14,4 @@ config MAINBOARD_VENDOR
|
||||||
string
|
string
|
||||||
default "Roda"
|
default "Roda"
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x4352
|
|
||||||
|
|
||||||
endif # VENDOR_RODA
|
endif # VENDOR_RODA
|
||||||
|
|
|
@ -46,10 +46,6 @@ config MAX_PHYSICAL_CPUS
|
||||||
int
|
int
|
||||||
default 2
|
default 2
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x6886
|
|
||||||
|
|
||||||
config MAXIMUM_SUPPORTED_FREQUENCY
|
config MAXIMUM_SUPPORTED_FREQUENCY
|
||||||
int
|
int
|
||||||
default 400
|
default 400
|
||||||
|
|
|
@ -28,6 +28,7 @@ chip northbridge/intel/i945
|
||||||
end
|
end
|
||||||
|
|
||||||
device pci_domain 0 on
|
device pci_domain 0 on
|
||||||
|
subsystemid 0x4352 0x0686 inherit
|
||||||
device pci 00.0 on end # host bridge
|
device pci 00.0 on end # host bridge
|
||||||
# auto detection:
|
# auto detection:
|
||||||
#device pci 01.0 off end # i945 PCIe root port
|
#device pci 01.0 off end # i945 PCIe root port
|
||||||
|
|
|
@ -75,12 +75,4 @@ config IRQ_SLOT_COUNT
|
||||||
int
|
int
|
||||||
default 11
|
default 11
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
||||||
hex
|
|
||||||
default 0x108e
|
|
||||||
|
|
||||||
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
||||||
hex
|
|
||||||
default 0x40
|
|
||||||
|
|
||||||
endif # BOARD_SUNW_ULTRA40
|
endif # BOARD_SUNW_ULTRA40
|
||||||
|
|
|
@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
|
||||||
end
|
end
|
||||||
end
|
end
|
||||||
device pci_domain 0 on # PCI domain
|
device pci_domain 0 on # PCI domain
|
||||||
|
subsystemid 0x108e 0x0040 inherit
|
||||||
chip northbridge/amd/amdk8 # Northbridge / RAM controller
|
chip northbridge/amd/amdk8 # Northbridge / RAM controller
|
||||||
device pci 18.0 on end
|
device pci 18.0 on end
|
||||||
device pci 18.0 on # Link 0 == LDT 0
|
device pci 18.0 on # Link 0 == LDT 0
|
||||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue