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intel/i945: Delay bridge VGA IO enable to ramstage 

Change-Id: Ifc54ecc96b6d9d79d5a16b2d7baeae70b59275c9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35676
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki 2019-09-29 07:03:37 +03:00
parent 444d2af9a9
commit 9137cbd5e4
1 changed files with 0 additions and 5 deletions
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5
src/northbridge/intel/i945/early_init.c
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@ -661,11 +661,6 @@ static void i945_setup_pci_express_x16(void)
reg32 = pci_read_config32(PCI_DEV(0, 0x0, 0), DEVEN);
reg32 &= ~(DEVEN_D2F0 | DEVEN_D2F1);
pci_write_config32(PCI_DEV(0, 0x0, 0), DEVEN, reg32);
/* Set VGA enable bit in PCIe bridge */
reg16 = pci_read_config16(p2peg, PCI_BRIDGE_CONTROL);
reg16 |= PCI_BRIDGE_CTL_VGA;
pci_write_config16(p2peg, PCI_BRIDGE_CONTROL, reg16);
}
/* Enable GPEs */