mb/google/poppy/variants/nocturne: update Audio configuration

This patch updates the below:
1)
Nocturne board has only Max98373 speaker amp.
Update both NHLT and DT entries to include only Max98373
and not include DA7219.

2) I2S2 is used for Boot Beep.
   So, update GPP_F0 ~ F2 pins accordingly.

3) Include DMIC-4ch configuration.

BUG=b:79362472
TEST=None [Waiting for HW to verify]

Change-Id: I0e9b3a564c22de6e84e96e5e937a3aca4ae73d75
Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Reviewed-on: https://review.coreboot.org/26143
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sathyanarayana Nujella 2018-05-07 16:06:59 -07:00 committed by Martin Roth
parent f706f8bffd
commit 9146ccd7e3
4 changed files with 8 additions and 30 deletions

View File

@ -81,8 +81,7 @@ config INCLUDE_NHLT_BLOBS_NAMI
config INCLUDE_NHLT_BLOBS_NOCTURNE config INCLUDE_NHLT_BLOBS_NOCTURNE
bool "Include blobs for nocturne audio." bool "Include blobs for nocturne audio."
select NHLT_DA7219 select NHLT_DMIC_4CH
select NHLT_DMIC_2CH
select NHLT_MAX98373 select NHLT_MAX98373
config MAINBOARD_DIR config MAINBOARD_DIR

View File

@ -274,23 +274,6 @@ chip soc/intel/skylake
register "name" = ""MAXL"" register "name" = ""MAXL""
device i2c 32 on end device i2c 32 on end
end end
chip drivers/i2c/da7219
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F10_IRQ)"
register "btn_cfg" = "50"
register "mic_det_thr" = "500"
register "jack_ins_deb" = "20"
register "jack_det_rate" = ""32ms_64ms""
register "jack_rem_deb" = "1"
register "a_d_btn_thr" = "0xa"
register "d_b_btn_thr" = "0x16"
register "b_c_btn_thr" = "0x21"
register "c_mic_btn_thr" = "0x3e"
register "btn_avg" = "4"
register "adc_1bit_rpt" = "1"
register "micbias_lvl" = "2600"
register "mic_amp_in_sel" = ""diff""
device i2c 1a on end
end
end # I2C #4 - Audio end # I2C #4 - Audio
device pci 1c.0 on device pci 1c.0 on
chip drivers/intel/wifi chip drivers/intel/wifi

View File

@ -258,11 +258,11 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NC(GPP_E23), PAD_CFG_NC(GPP_E23),
/* F0 : I2S2_SCLK ==> BOOT_BEEP_CLK */ /* F0 : I2S2_SCLK ==> BOOT_BEEP_CLK */
PAD_CFG_NF_1V8(GPP_F0, NONE, DEEP, NF1), PAD_CFG_GPI_GPIO_DRIVER(GPP_F0, NONE, DEEP),
/* F1 : I2S2_SFRM ==> BOOT_BEEP_BUFFER_OE */ /* F1 : I2S2_SFRM ==> BOOT_BEEP_BUFFER_OE */
PAD_CFG_NF_1V8(GPP_F1, NONE, DEEP, NF1), PAD_CFG_GPO(GPP_F1, 1, DEEP),
/* F2 : I2S2_TXD ==> BOOT_BEEP_SFRM */ /* F2 : I2S2_TXD ==> BOOT_BEEP_SFRM */
PAD_CFG_NC(GPP_F2), PAD_CFG_GPI_GPIO_DRIVER(GPP_F2, NONE, DEEP),
/* F3 : I2S2_RXD ==> NC */ /* F3 : I2S2_RXD ==> NC */
PAD_CFG_NC(GPP_F3), PAD_CFG_NC(GPP_F3),
/* F4 : I2C2_SDA ==> NC */ /* F4 : I2C2_SDA ==> NC */

View File

@ -20,13 +20,9 @@
void variant_nhlt_init(struct nhlt *nhlt) void variant_nhlt_init(struct nhlt *nhlt)
{ {
/* 2 Channel DMIC array. */ /* 4 Channel DMIC array. */
if (nhlt_soc_add_dmic_array(nhlt, 2)) if (nhlt_soc_add_dmic_array(nhlt, 4))
printk(BIOS_ERR, "Couldn't add 2CH DMIC array.\n"); printk(BIOS_ERR, "Couldn't add 4CH DMIC array.\n");
/* Dialog DA7219 Headset codec. */
if (nhlt_soc_add_da7219(nhlt, AUDIO_LINK_SSP1))
printk(BIOS_ERR, "Couldn't add Dialog DA7219 codec.\n");
/* MAXIM Smart Amps for left and right speakers. */ /* MAXIM Smart Amps for left and right speakers. */
if (nhlt_soc_add_max98373(nhlt, AUDIO_LINK_SSP0)) if (nhlt_soc_add_max98373(nhlt, AUDIO_LINK_SSP0))
@ -37,6 +33,6 @@ void variant_nhlt_oem_overrides(const char **oem_id, const char **oem_table_id,
uint32_t *oem_revision) uint32_t *oem_revision)
{ {
*oem_id = "GOOGLE"; *oem_id = "GOOGLE";
*oem_table_id = "NOCTURNEMAX"; *oem_table_id = "NOCTURNE";
*oem_revision = 0; *oem_revision = 0;
} }