From 914e6b44bb189123cbc5555368d384c7ebf0e00c Mon Sep 17 00:00:00 2001
From: Marshall Dawson <marshalldawson3rd@gmail.com>
Date: Mon, 1 Jul 2019 09:56:12 -0500
Subject: [PATCH] cpu/amd/msr: Clarify MMIO_CONF shift value

MMIO_BUS_RANGE_SHIFT is a numerical value and not a bit field.
Change it to simply 2.  Otherwise its usage winds up evaluating
to BusRange << (1 << 1).

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I2a6ecfc9fbfd45f69194b8daef43ff84a1dfd5fc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33942
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
---
 src/include/cpu/amd/msr.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/include/cpu/amd/msr.h b/src/include/cpu/amd/msr.h
index 5d7b5e4fda..0f88e516d1 100644
--- a/src/include/cpu/amd/msr.h
+++ b/src/include/cpu/amd/msr.h
@@ -39,7 +39,7 @@
 #define MSR_INTPEND			0xC0010055
 #define MMIO_CONF_BASE			0xC0010058
 #define  MMIO_RANGE_EN			(1 << 0)
-#define  MMIO_BUS_RANGE_SHIFT		(1 << 1)
+#define  MMIO_BUS_RANGE_SHIFT		2
 	/* P-state Current Limit Register */
 #define PS_LIM_REG			0xC0010061
 	 /* P-state Maximum Value shift position */