GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

AMD Kabini: Modify Hudson southbridge to support new AMD processor 

Yangtze uses Hudson AGESA wrapper code but has some changes.
The changes are necessary and have no effects on Hudson.

Change-Id: Iada90d34fdc2025bd14f566488ee12810a28ac0d
Signed-off-by: Siyuan Wang <SiYuan.Wang@amd.com>
Signed-off-by: Siyuan Wang <wangsiyuanbuaa@gmail.com>
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Tested-by: Bruce Griffith <bruce.griffith@se-eng.com>
Reviewed-on: http://review.coreboot.org/3783
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martin.roth@se-eng.com>
This commit is contained in:
Siyuan Wang 2013-07-09 17:32:42 +08:00 committed by Bruce Griffith
parent 3e32cc00d1
commit 915714501b
6 changed files with 38 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/southbridge/amd/Makefile.inc
View File

@ -15,6 +15,7 @@ subdirs-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_SB700) += cimx
subdirs-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800) += cimx
subdirs-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900) += cimx
subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON) += agesa
subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE) += agesa
ifeq ($(CONFIG_HAVE_ACPI_RESUME), y)
ifeq ($(CONFIG_CPU_AMD_AGESA), y)

1
src/southbridge/amd/agesa/Makefile.inc
View File

@ -17,3 +17,4 @@
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON) += hudson
subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE) += hudson

25
src/southbridge/amd/agesa/hudson/Kconfig
View File

@ -23,7 +23,13 @@ config SOUTHBRIDGE_AMD_AGESA_HUDSON
select HAVE_USBDEBUG
select HAVE_HARD_RESET
if SOUTHBRIDGE_AMD_AGESA_HUDSON
config SOUTHBRIDGE_AMD_AGESA_YANGTZE
bool
select IOAPIC
select HAVE_USBDEBUG
select HAVE_HARD_RESET
if SOUTHBRIDGE_AMD_AGESA_HUDSON || SOUTHBRIDGE_AMD_AGESA_YANGTZE
config BOOTBLOCK_SOUTHBRIDGE_INIT
string
@ -72,17 +78,20 @@ config HUDSON_GEC_FWM
config HUDSON_XHCI_FWM_FILE
string "XHCI firmware path and filename"
default "3rdparty/southbridge/amd/hudson/xhci.bin"
default "3rdparty/southbridge/amd/hudson/xhci.bin" if SOUTHBRIDGE_AMD_AGESA_HUDSON
default "3rdparty/southbridge/amd/yangtze/xhci.bin" if SOUTHBRIDGE_AMD_AGESA_YANGTZE
depends on HUDSON_XHCI_FWM
config HUDSON_IMC_FWM_FILE
string "IMC firmware path and filename"
default "3rdparty/southbridge/amd/hudson/imc.bin"
default "3rdparty/southbridge/amd/hudson/imc.bin" if SOUTHBRIDGE_AMD_AGESA_HUDSON
default "3rdparty/southbridge/amd/yangtze/imc.bin" if SOUTHBRIDGE_AMD_AGESA_YANGTZE
depends on HUDSON_IMC_FWM
config HUDSON_GEC_FWM_FILE
string "GEC firmware path and filename"
default "3rdparty/southbridge/amd/hudson/gec.bin"
default "3rdparty/southbridge/amd/hudson/gec.bin" if SOUTHBRIDGE_AMD_AGESA_HUDSON
default "3rdparty/southbridge/amd/yangtze/gec.bin" if SOUTHBRIDGE_AMD_AGESA_YANGTZE
depends on HUDSON_GEC_FWM
config HUDSON_FWM
@ -232,4 +241,10 @@ config HUDSON_LEGACY_FREE
Select y if there is no keyboard controller in the system.
This sets variables in AGESA and ACPI.
endif # SOUTHBRIDGE_AMD_AGESA_HUDSON
endif # SOUTHBRIDGE_AMD_AGESA_HUDSON || SOUTHBRIDGE_AMD_AGESA_YANGTZE
if SOUTHBRIDGE_AMD_AGESA_YANGTZE
config AMD_SB_SPI_TX_LEN
int
default 64
endif

6
src/southbridge/amd/agesa/hudson/sata.c
View File

@ -49,3 +49,9 @@ static const struct pci_driver sata0_driver __pci_driver = {
.vendor = PCI_VENDOR_ID_AMD,
.device = PCI_DEVICE_ID_ATI_SB900_SATA,
};
static const struct pci_driver sata0_driver_ahci __pci_driver = {
.ops = &sata_ops,
.vendor = PCI_VENDOR_ID_AMD,
.device = PCI_DEVICE_ID_ATI_SB900_SATA_AHCI,
};

1
src/southbridge/amd/agesa/hudson/sm.c
View File

@ -82,6 +82,7 @@
static void sm_init(device_t dev)
{
setup_ioapic(IO_APIC_ADDR, CONFIG_MAX_CPUS);
}
static int lsmbus_recv_byte(device_t dev)

9
src/southbridge/amd/agesa/hudson/spi.c
View File

@ -61,7 +61,9 @@ int spi_xfer(struct spi_slave *slave, const void *dout,
/* First byte is cmd which can not being sent through FIFO. */
u8 cmd = *(u8 *)dout++;
u8 readoffby1;
#if !CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE
u8 readwrite;
#endif
u8 bytesout, bytesin;
u8 count;
@ -71,8 +73,15 @@ int spi_xfer(struct spi_slave *slave, const void *dout,
readoffby1 = bytesout ? 0 : 1;
#if CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE
write8(spibar + 0x1E, 5);
write8(spibar + 0x1F, bytesout); /* SpiExtRegIndx [5] - TxByteCount */
write8(spibar + 0x1E, 6);
write8(spibar + 0x1F, bytesin); /* SpiExtRegIndx [6] - RxByteCount */
#else
readwrite = (bytesin + readoffby1) << 4 | bytesout;
write8(spibar + 1, readwrite);
#endif
write8(spibar + 0, cmd);
reset_internal_fifo_pointer();