diff --git a/src/soc/intel/alderlake/include/soc/vr_config.h b/src/soc/intel/alderlake/include/soc/vr_config.h
index 316abc0dd2..41c2f6b55e 100644
--- a/src/soc/intel/alderlake/include/soc/vr_config.h
+++ b/src/soc/intel/alderlake/include/soc/vr_config.h
@@ -8,6 +8,25 @@
 #include <fsp/api.h>
 
 struct vr_config {
+#if CONFIG(SOC_INTEL_RAPTORLAKE)
+	/*
+	 * When enabled, this feature makes the SoC throttle when the power
+	 * consumption exceeds the I_TRIP threshold.
+	 *
+	 * FSPs sets a by default I_TRIP threshold adapted to the current SoC
+	 * and assuming a Voltage Regulator error accuracy of 6.5%.
+	 */
+	bool enable_fast_vmode;
+
+	/*
+	 * VR Fast Vmode I_TRIP threshold.
+	 * 0-255A in 1/4 A units. Example: 400 = 100A
+
+	 * This setting overrides the default value set by FSPs when Fast VMode
+	 * is enabled.
+	 */
+	uint16_t fast_vmode_i_trip;
+#endif
 
 	/* The below settings will take effect when this is set to 1 for that domain. */
 	bool vr_config_enable;
diff --git a/src/soc/intel/alderlake/vr_config.c b/src/soc/intel/alderlake/vr_config.c
index 159f4514bd..4d649fbfec 100644
--- a/src/soc/intel/alderlake/vr_config.c
+++ b/src/soc/intel/alderlake/vr_config.c
@@ -254,6 +254,16 @@ static const struct vr_lookup vr_config_tdc_currentlimit[] = {
 	{ PCI_DID_INTEL_ADL_S_ID_12, 35,  VR_CFG_ALL_DOMAINS_TDC_CURRENT(30, 30) },
 };
 
+static void fill_vr_fast_vmode(FSP_S_CONFIG *s_cfg,
+		int domain, const struct vr_config *chip_cfg)
+{
+#if CONFIG(SOC_INTEL_RAPTORLAKE)
+	s_cfg->EnableFastVmode[domain] = chip_cfg->enable_fast_vmode;
+	if (s_cfg->EnableFastVmode[domain])
+		s_cfg->IccLimit[domain] = chip_cfg->fast_vmode_i_trip;
+#endif
+}
+
 void fill_vr_domain_config(FSP_S_CONFIG *s_cfg,
 		int domain, const struct vr_config *chip_cfg)
 {
@@ -299,6 +309,8 @@ void fill_vr_domain_config(FSP_S_CONFIG *s_cfg,
 							domain, mch_id, tdp);
 	}
 
+	fill_vr_fast_vmode(s_cfg, domain, chip_cfg);
+
 	/* Check TdcTimeWindow and TdcCurrentLimit,
 	   Set TdcEnable and Set VR TDC Input current to root mean square */
 	if (s_cfg->TdcTimeWindow[domain] != 0 && s_cfg->TdcCurrentLimit[domain] != 0) {