mediatek/mt8183: Allow modifying vcore voltage
Because vcore is the power of ddrphy in the soc, DRAM DVFS needs to be calibrated with different vcore voltages to get correct parameters. A new API is added to allow changing vcore voltage. BUG=b:80501386 BRANCH=none TEST=measure vcore voltage with multimeter Change-Id: Ic43d5efe7e597121775dc853a3e2a08ebc59657d Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33391 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -25,6 +25,9 @@ enum {
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PMIC_TOP_TMA_KEY = 0x03a8,
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PMIC_PWRHOLD = 0x0a08,
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PMIC_CPSDSA4 = 0x0a2e,
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PMIC_VCORE_OP_EN = 0x1490,
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PMIC_VCORE_DBG0 = 0x149e,
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PMIC_VCORE_VOSEL = 0x14aa,
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PMIC_VDRAM1_VOSEL_SLEEP = 0x160a,
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PMIC_SMPS_ANA_CON0 = 0x1808,
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PMIC_VSIM2_ANA_CON0 = 0x1e30,
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@ -41,5 +44,7 @@ void mt6358_init(void);
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void pmic_set_power_hold(bool enable);
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void pmic_set_vsim2_cali(unsigned int vsim2_mv);
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void pmic_init_scp_voltage(void);
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unsigned int pmic_get_vcore_vol(void);
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void pmic_set_vcore_vol(unsigned int vcore_uv);
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#endif /* __SOC_MEDIATEK_MT6358_H__ */
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@ -805,6 +805,27 @@ void pmic_set_vsim2_cali(unsigned int vsim2_mv)
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pwrap_write_field(PMIC_VSIM2_ANA_CON0, cali_mv / 10, 0xF, 0);
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}
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unsigned int pmic_get_vcore_vol(void)
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{
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unsigned int vol_reg;
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vol_reg = pwrap_read_field(PMIC_VCORE_DBG0, 0x7F, 0);
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return 500000 + vol_reg * 6250;
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}
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void pmic_set_vcore_vol(unsigned int vcore_uv)
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{
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unsigned int vol_reg;
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assert(vcore_uv >= 500000);
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assert(vcore_uv <= 1100000);
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vol_reg = (vcore_uv - 500000) / 6250;
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pwrap_write_field(PMIC_VCORE_OP_EN, 1, 0x7F, 0);
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pwrap_write_field(PMIC_VCORE_VOSEL, vol_reg, 0x7F, 0);
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}
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static void pmic_wdt_set(void)
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{
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/* [5]=1, RG_WDTRSTB_DEB */
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