mb/google/dedede: Create cappy2 variant

Create the cappy2 variant of the waddledee reference board by
copying the template files to a new directory named for the variant.

(Auto-Generated by create_coreboot_variant.sh version 4.5.0).

BUG=b:192035460
BRANCH=None
TEST=util/abuild/abuild -p none -t google/dedede -x -a
make sure the build includes GOOGLE_CAPPY2

Signed-off-by: Sunway <lisunwei@huaqin.corp-partner.google.com>
Change-Id: I772801152b9ca9c2c6afe76a353cb2b62d6210ce
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55886
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Sunway 2021-06-28 14:33:54 +08:00 committed by Patrick Georgi
parent 9ce8cb1629
commit 917785a3bb
8 changed files with 82 additions and 0 deletions

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@ -114,6 +114,7 @@ config MAINBOARD_PART_NUMBER
default "Pirika" if BOARD_GOOGLE_PIRIKA
default "Haboki" if BOARD_GOOGLE_HABOKI
default "Cappy" if BOARD_GOOGLE_CAPPY
default "Cappy2" if BOARD_GOOGLE_CAPPY2
config MAX_CPUS
int
@ -152,6 +153,7 @@ config VARIANT_DIR
default "pirika" if BOARD_GOOGLE_PIRIKA
default "haboki" if BOARD_GOOGLE_HABOKI
default "cappy" if BOARD_GOOGLE_CAPPY
default "cappy2" if BOARD_GOOGLE_CAPPY2
endif #BOARD_GOOGLE_BASEBOARD_DEDEDE

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@ -153,3 +153,8 @@ config BOARD_GOOGLE_CAPPY
bool "-> Cappy"
select BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50
select BASEBOARD_DEDEDE_LAPTOP
config BOARD_GOOGLE_CAPPY2
bool "-> Cappy2"
select BOARD_GOOGLE_BASEBOARD_DEDEDE_TPM2
select BASEBOARD_DEDEDE_LAPTOP

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@ -0,0 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef MAINBOARD_EC_H
#define MAINBOARD_EC_H
#include <baseboard/ec.h>
#endif

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@ -0,0 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef MAINBOARD_GPIO_H
#define MAINBOARD_GPIO_H
#include <baseboard/gpio.h>
#endif /* MAINBOARD_GPIO_H */

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@ -0,0 +1,5 @@
## SPDX-License-Identifier: GPL-2.0-or-later
## This is an auto-generated file. Do not edit!!
## Add memory parts in mem_parts_used.txt and run spd_tools to regenerate.
SPD_SOURCES = placeholder.spd.hex

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@ -0,0 +1 @@
DRAM Part Name ID to assign

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@ -0,0 +1,11 @@
# This is a CSV file containing a list of memory parts used by this variant.
# One part per line with an optional fixed ID in column 2.
# Only include a fixed ID if it is required for legacy reasons!
# Generated IDs are dependent on the order of parts in this file,
# so new parts must always be added at the end of the file!
#
# Generate an updated Makefile.inc and dram_id.generated.txt by running the
# gen_part_id tool from util/spd_tools/{ddr4,lp4x}.
# See util/spd_tools/{ddr4,lp4x}/README.md for more details and instructions.
# Part Name

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@ -0,0 +1,42 @@
chip soc/intel/jasperlake
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |
#+-------------------+---------------------------+
#| GSPI0 | cr50 TPM. Early init is |
#| | required to set up a BAR |
#| | for TPM communication |
#| | before memory is up |
#| I2C0 | Trackpad |
#| I2C1 | Digitizer |
#| I2C2 | Touchscreen |
#| I2C3 | Camera |
#| I2C4 | Audio |
#+-------------------+---------------------------+
register "common_soc_config" = "{
.gspi[0] = {
.speed_mhz = 1,
.early_init = 1,
},
.i2c[0] = {
.speed = I2C_SPEED_FAST,
},
.i2c[1] = {
.speed = I2C_SPEED_FAST,
},
.i2c[2] = {
.speed = I2C_SPEED_FAST,
},
.i2c[3] = {
.speed = I2C_SPEED_FAST,
},
.i2c[4] = {
.speed = I2C_SPEED_FAST,
},
}"
device domain 0 on
device pci 15.0 on end
end
end