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soc/amd/picasso/pcie_gpp: Add clarifying comment 

Each bridge can only have one device.

BUG=b:170595019
BRANCH=zork
TEST=none

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I7e476221dfcabc841cc1ed4bc4b1175c0652dcfe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49841
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Raul E Rangel 2021-01-22 09:44:03 -07:00 committed by Felix Held
parent 76e72a0dd5
commit 91839eef5c
1 changed files with 2 additions and 0 deletions
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src/soc/amd/picasso/pcie_gpp.c
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@ -153,6 +153,7 @@ static void acpigen_write_PRT(const struct device *dev)
irq_index = calculate_irq(pci_routing, i);
acpigen_write_package(4);
/* There is only one device attached to the bridge */
acpigen_write_dword(0x0000FFFF);
acpigen_write_byte(i);
acpigen_write_byte(0); /* Source: GSI */
@ -176,6 +177,7 @@ static void acpigen_write_PRT(const struct device *dev)
link_template[8] = 'A' + (irq_index % 8);
acpigen_write_package(4);
/* There is only one device attached to the bridge */
acpigen_write_dword(0x0000FFFF);
acpigen_write_byte(i);
acpigen_emit_namestring(link_template);