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ACPI: Have single call-site for acpi_inject_nvsa() 

Change-Id: I61a9b07ec3fdaeef0622df82e106405f01e89a9e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48719
Reviewed-by: Lance Zhao
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2020-06-30 11:42:52 +03:00 committed by Angel Pons
parent c84572e0e1
commit 91946c5b13
22 changed files with 4 additions and 102 deletions
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14
src/acpi/gnvs.c
View File

@ -68,16 +68,6 @@ void *gnvs_get_or_create(void)
return gnvs;
}
void acpi_inject_nvsa(void)
{
if (!gnvs)
return;
acpigen_write_scope("\\");
acpigen_write_name_dword("NVSA", (uintptr_t)gnvs);
acpigen_pop_len();
}
void acpi_fill_gnvs(void)
{
if (!gnvs)
@ -85,4 +75,8 @@ void acpi_fill_gnvs(void)
soc_fill_gnvs(gnvs);
mainboard_fill_gnvs(gnvs);
acpigen_write_scope("\\");
acpigen_write_name_dword("NVSA", (uintptr_t)gnvs);
acpigen_pop_len();
}

8
src/include/acpi/acpi_gnvs.h
View File

@ -7,7 +7,6 @@
void *acpi_get_gnvs(void);
void *gnvs_get_or_create(void);
void acpi_inject_nvsa(void);
void gnvs_assign_chromeos(void);
void gnvs_set_ecfw_rw(void);
@ -18,13 +17,6 @@ size_t gnvs_size_of_array(void);
uint32_t *gnvs_cbmc_ptr(struct global_nvs *gnvs);
void *gnvs_chromeos_ptr(struct global_nvs *gnvs);
/*
* Creates acpi gnvs and adds it to the DSDT table.
* GNVS creation is chipset specific and is done in soc specific acpi.c file.
*/
struct device;
void southbridge_inject_dsdt(const struct device *device);
/*
* These functions populate the gnvs structure in acpi table.
* Defined as weak in common acpi as gnvs structure definition is

1
src/soc/amd/common/block/lpc/lpc.c
View File

@ -323,7 +323,6 @@ static struct device_operations lpc_ops = {
.read_resources = lpc_read_resources,
.set_resources = lpc_set_resources,
.enable_resources = lpc_enable_resources,
.acpi_inject_dsdt = southbridge_inject_dsdt,
.write_acpi_tables = southbridge_write_acpi_tables,
.init = lpc_init,
.scan_bus = scan_static_bus,

5
src/soc/amd/picasso/acpi.c
View File

@ -403,11 +403,6 @@ void soc_fill_gnvs(struct global_nvs *gnvs)
gnvs->pcnt = dev_count_cpu();
}
void southbridge_inject_dsdt(const struct device *device)
{
acpi_inject_nvsa();
}
static int acpigen_soc_gpio_op(const char *op, unsigned int gpio_num)
{
if (gpio_num >= SOC_GPIO_TOTAL_PINS) {

5
src/soc/amd/stoneyridge/acpi.c
View File

@ -171,11 +171,6 @@ void soc_fill_gnvs(struct global_nvs *gnvs)
gnvs->pcnt = dev_count_cpu();
}
void southbridge_inject_dsdt(const struct device *device)
{
acpi_inject_nvsa();
}
static void acpigen_soc_get_gpio_in_local5(uintptr_t addr)
{
/*

6
src/soc/intel/baytrail/southcluster.c
View File

@ -482,15 +482,9 @@ void southcluster_enable_dev(struct device *dev)
}
}
static void southcluster_inject_dsdt(const struct device *device)
{
acpi_inject_nvsa();
}
static struct device_operations device_ops = {
.read_resources = sc_read_resources,
.set_resources = pci_dev_set_resources,
.acpi_inject_dsdt = southcluster_inject_dsdt,
.write_acpi_tables = acpi_write_hpet,
.init = sc_init,
.enable = southcluster_enable_dev,

5
src/soc/intel/braswell/acpi.c
View File

@ -364,11 +364,6 @@ unsigned long southcluster_write_acpi_tables(const struct device *device, unsign
return current;
}
void southcluster_inject_dsdt(const struct device *device)
{
acpi_inject_nvsa();
}
__weak void acpi_create_serialio_ssdt(acpi_header_t *ssdt)
{
}

1
src/soc/intel/braswell/include/soc/acpi.h
View File

@ -8,7 +8,6 @@
int acpi_sci_irq(void);
void acpi_create_serialio_ssdt(acpi_header_t *ssdt);
unsigned long acpi_madt_irq_overrides(unsigned long current);
void southcluster_inject_dsdt(const struct device *device);
unsigned long southcluster_write_acpi_tables(const struct device *device,
unsigned long current, struct acpi_rsdp *rsdp);

1
src/soc/intel/braswell/southcluster.c
View File

@ -531,7 +531,6 @@ void southcluster_enable_dev(struct device *dev)
static struct device_operations device_ops = {
.read_resources = sc_read_resources,
.set_resources = pci_dev_set_resources,
.acpi_inject_dsdt = southcluster_inject_dsdt,
.write_acpi_tables = southcluster_write_acpi_tables,
.init = sc_init,
.enable = southcluster_enable_dev,

6
src/soc/intel/broadwell/pch/lpc.c
View File

@ -609,11 +609,6 @@ void soc_fill_gnvs(struct global_nvs *gnvs)
gnvs->pcnt = dev_count_cpu();
}
static void southcluster_inject_dsdt(const struct device *device)
{
acpi_inject_nvsa();
}
static unsigned long broadwell_write_acpi_tables(const struct device *device,
unsigned long current,
struct acpi_rsdp *rsdp)
@ -630,7 +625,6 @@ static struct device_operations device_ops = {
.read_resources = &pch_lpc_read_resources,
.set_resources = &pci_dev_set_resources,
.enable_resources = &pci_dev_enable_resources,
.acpi_inject_dsdt = southcluster_inject_dsdt,
.write_acpi_tables = broadwell_write_acpi_tables,
.init = &lpc_init,
.scan_bus = &scan_static_bus,

5
src/soc/intel/common/block/acpi/acpi.c
View File

@ -236,11 +236,6 @@ static int acpi_fill_wake(uint32_t *pm1, uint32_t **gpe0)
}
#endif
void southbridge_inject_dsdt(const struct device *device)
{
acpi_inject_nvsa();
}
int common_calculate_power_ratio(int tdp, int p1_ratio, int ratio)
{
u32 m;

1
src/soc/intel/common/block/lpc/lpc.c
View File

@ -107,7 +107,6 @@ static struct device_operations device_ops = {
.enable_resources = pci_dev_enable_resources,
#if CONFIG(HAVE_ACPI_TABLES)
.write_acpi_tables = southbridge_write_acpi_tables,
.acpi_inject_dsdt = southbridge_inject_dsdt,
.acpi_name = lpc_acpi_name,
#endif
.init = lpc_soc_init,

5
src/soc/intel/denverton_ns/acpi.c
View File

@ -241,11 +241,6 @@ unsigned long southcluster_write_acpi_tables(const struct device *device,
return current;
}
void southcluster_inject_dsdt(const struct device *device)
{
acpi_inject_nvsa();
}
__weak void acpi_create_serialio_ssdt(acpi_header_t *ssdt) {}
static unsigned long acpi_fill_dmar(unsigned long current)

1
src/soc/intel/denverton_ns/include/soc/acpi.h
View File

@ -10,7 +10,6 @@ unsigned long acpi_madt_irq_overrides(unsigned long current);
unsigned long southcluster_write_acpi_tables(const struct device *device,
unsigned long current,
struct acpi_rsdp *rsdp);
void southcluster_inject_dsdt(const struct device *device);
unsigned long systemagent_write_acpi_tables(const struct device *dev,
unsigned long start,
struct acpi_rsdp *const rsdp);

1
src/soc/intel/denverton_ns/lpc.c
View File

@ -536,7 +536,6 @@ static struct device_operations device_ops = {
.read_resources = lpc_read_resources,
.set_resources = pci_dev_set_resources,
#if CONFIG(HAVE_ACPI_TABLES)
.acpi_inject_dsdt = southcluster_inject_dsdt,
.write_acpi_tables = southcluster_write_acpi_tables,
#endif
.enable_resources = lpc_enable_resources,

5
src/soc/intel/skylake/acpi.c
View File

@ -522,11 +522,6 @@ unsigned long southbridge_write_acpi_tables(const struct device *device,
return acpi_align_current(current);
}
void southbridge_inject_dsdt(const struct device *device)
{
acpi_inject_nvsa();
}
/* Save wake source information for calculating ACPI _SWS values */
int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0)
{

6
src/southbridge/intel/bd82x6x/lpc.c
View File

@ -658,11 +658,6 @@ void soc_fill_gnvs(struct global_nvs *gnvs)
gnvs->pcnt = dev_count_cpu();
}
void southbridge_inject_dsdt(const struct device *dev)
{
acpi_inject_nvsa();
}
static const char *lpc_acpi_name(const struct device *dev)
{
return "LPCB";
@ -710,7 +705,6 @@ static struct device_operations device_ops = {
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.write_acpi_tables = acpi_write_hpet,
.acpi_inject_dsdt = southbridge_inject_dsdt,
.acpi_fill_ssdt = southbridge_fill_ssdt,
.acpi_name = lpc_acpi_name,
.init = lpc_init,

6
src/southbridge/intel/i82801gx/lpc.c
View File

@ -489,11 +489,6 @@ void soc_fill_gnvs(struct global_nvs *gnvs)
gnvs->mpen = 1; /* Enable Multi Processing */
}
void southbridge_inject_dsdt(const struct device *dev)
{
acpi_inject_nvsa();
}
static const char *lpc_acpi_name(const struct device *dev)
{
return "LPCB";
@ -508,7 +503,6 @@ static struct device_operations device_ops = {
.read_resources = i82801gx_lpc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.acpi_inject_dsdt = southbridge_inject_dsdt,
.write_acpi_tables = acpi_write_hpet,
.acpi_fill_ssdt = southbridge_fill_ssdt,
.acpi_name = lpc_acpi_name,

6
src/southbridge/intel/i82801ix/lpc.c
View File

@ -463,11 +463,6 @@ void *gnvs_chromeos_ptr(struct global_nvs *gnvs)
return 0;
}
void southbridge_inject_dsdt(const struct device *dev)
{
acpi_inject_nvsa();
}
static const char *lpc_acpi_name(const struct device *dev)
{
return "LPCB";
@ -486,7 +481,6 @@ static struct device_operations device_ops = {
.read_resources = i82801ix_lpc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.acpi_inject_dsdt = southbridge_inject_dsdt,
.write_acpi_tables = acpi_write_hpet,
.acpi_fill_ssdt = southbridge_fill_ssdt,
.acpi_name = lpc_acpi_name,

6
src/southbridge/intel/i82801jx/lpc.c
View File

@ -481,11 +481,6 @@ size_t gnvs_size_of_array(void)
return sizeof(struct global_nvs);
}
void southbridge_inject_dsdt(const struct device *dev)
{
acpi_inject_nvsa();
}
static const char *lpc_acpi_name(const struct device *dev)
{
return "LPCB";
@ -504,7 +499,6 @@ static struct device_operations device_ops = {
.read_resources = i82801jx_lpc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.acpi_inject_dsdt = southbridge_inject_dsdt,
.write_acpi_tables = acpi_write_hpet,
.acpi_fill_ssdt = southbridge_fill_ssdt,
.acpi_name = lpc_acpi_name,

6
src/southbridge/intel/ibexpeak/lpc.c
View File

@ -553,11 +553,6 @@ void soc_fill_gnvs(struct global_nvs *gnvs)
gnvs->pcnt = dev_count_cpu();
}
void southbridge_inject_dsdt(const struct device *dev)
{
acpi_inject_nvsa();
}
static const char *lpc_acpi_name(const struct device *dev)
{
return "LPCB";
@ -587,7 +582,6 @@ static struct device_operations device_ops = {
.read_resources = pch_lpc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.acpi_inject_dsdt = southbridge_inject_dsdt,
.acpi_fill_ssdt = southbridge_fill_ssdt,
.acpi_name = lpc_acpi_name,
.write_acpi_tables = acpi_write_hpet,

6
src/southbridge/intel/lynxpoint/lpc.c
View File

@ -701,11 +701,6 @@ void soc_fill_gnvs(struct global_nvs *gnvs)
gnvs->pcnt = dev_count_cpu();
}
void southbridge_inject_dsdt(const struct device *dev)
{
acpi_inject_nvsa();
}
static const char *lpc_acpi_name(const struct device *dev)
{
return "LPCB";
@ -759,7 +754,6 @@ static struct device_operations device_ops = {
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.acpi_fill_ssdt = southbridge_fill_ssdt,
.acpi_inject_dsdt = southbridge_inject_dsdt,
.acpi_name = lpc_acpi_name,
.write_acpi_tables = southbridge_write_acpi_tables,
.init = lpc_init,