GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mediatek/mt8183: Add register definitions of DRAM controller 

Add register definitions of DRAM controller.

BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Kukui

Change-Id: I8b51486deab856a783b87f0b2812a991d4111020
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/28668
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
This commit is contained in:
Tristan Shieh 2018-09-14 11:19:07 +08:00 committed by Patrick Georgi
parent 2c5652d72b
commit 91a580308c
2 changed files with 1231 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/soc/mediatek/mt8183/include/soc/addressmap.h
View File

@ -19,7 +19,6 @@
enum { enum {
MCUCFG_BASE = 0x0C530000, MCUCFG_BASE = 0x0C530000,
IO_PHYS = 0x10000000, IO_PHYS = 0x10000000,
DDR_BASE = 0x40000000
}; };
enum { enum {
@ -30,6 +29,9 @@ enum {
RGU_BASE = IO_PHYS + 0x00007000, RGU_BASE = IO_PHYS + 0x00007000,
GPT_BASE = IO_PHYS + 0x00008000, GPT_BASE = IO_PHYS + 0x00008000,
APMIXED_BASE = IO_PHYS + 0x0000C000, APMIXED_BASE = IO_PHYS + 0x0000C000,
EMI_BASE = IO_PHYS + 0x00219000,
EMI_MPU_BASE = IO_PHYS + 0x00226000,
DRAMC_CH_BASE = IO_PHYS + 0x00228000,
UART0_BASE = IO_PHYS + 0x01002000, UART0_BASE = IO_PHYS + 0x01002000,
SPI0_BASE = IO_PHYS + 0x0100A000, SPI0_BASE = IO_PHYS + 0x0100A000,
SPI1_BASE = IO_PHYS + 0x01010000, SPI1_BASE = IO_PHYS + 0x01010000,

1228
src/soc/mediatek/mt8183/include/soc/dramc_register.h Normal file
View File

File diff suppressed because it is too large Load Diff