intel/quark: Use common romstage entry
Change-Id: Ifb2adcdef7265d43cb2bf6886f126f1a17bf08a0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35146 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -22,5 +22,6 @@ romstage-y += mtrr.c
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romstage-y += pcie.c
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romstage-y += report_platform.c
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romstage-y += romstage.c
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romstage-y += ../../../../cpu/intel/car/romstage.c
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postcar-y += mtrr.c
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@ -13,7 +13,6 @@
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* GNU General Public License for more details.
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*/
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#include <arch/cpu.h>
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#include <arch/romstage.h>
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#include <arch/symbols.h>
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#include <console/console.h>
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@ -28,9 +27,7 @@
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#include <soc/reg_access.h>
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#include <soc/storage_test.h>
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static struct postcar_frame early_mtrrs;
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asmlinkage void car_stage_entry(void)
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void mainboard_romstage_entry(void)
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{
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bool s3wake;
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@ -61,9 +58,6 @@ asmlinkage void car_stage_entry(void)
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/* Initialize the PCIe bridges */
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pcie_init();
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prepare_and_run_postcar(&early_mtrrs);
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/* We do not return here. */
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}
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static struct chipset_power_state power_state;
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