From 91d5a6cc47d7155150eae5eaf0e4f5035e8df7a5 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Tue, 1 Dec 2020 23:26:45 +0100 Subject: [PATCH] cpu/x86/lapic/secondary.S: Adapt for x86_64 Adapt the old lapic init code for x86_64. Change-Id: I5128ed574323025e927137870fb10b23d06bc01d Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/48221 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/cpu/x86/lapic/secondary.S | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S index 8a44112943..073e6b485b 100644 --- a/src/cpu/x86/lapic/secondary.S +++ b/src/cpu/x86/lapic/secondary.S @@ -33,7 +33,11 @@ _secondary_start: _secondary_gdt_addr: gdtaddr: .word 0 /* the table limit */ +#if ENV_X86_64 + .quad 0 +#else .long 0 /* we know the offset */ +#endif _secondary_start_end: @@ -54,14 +58,23 @@ __ap_protected_start: /* Load the Interrupt descriptor table */ lidt idtarg +#if ENV_X86_64 + /* entry64.inc preserves ebx. */ + #include + mov secondary_stack, %rsp + andl $0xfffffff0, %esp + mov secondary_cpu_index, %rdi +#else /* Set the stack pointer, and flag that we are done */ xorl %eax, %eax movl secondary_stack, %esp + andl $0xfffffff0, %esp sub $12, %esp /* maintain 16-byte alignment for the call below */ movl secondary_cpu_index, %edi pushl %edi movl %eax, secondary_stack +#endif call secondary_cpu_init 1: hlt