*** empty log message ***

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1270 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/arch/ppc/include/arch/pciconf.h

@@ -1,9 +1,17 @@
-#ifndef PCI_CONF_REG_INDEX
+#ifndef _PCICONF_H
+#define _PCICONF_H
 
-// These are defined in the PCI spec, and hence are theoretically
+/*      
-// inclusive of ANYTHING that uses a PCI bus. 
+ * Direct access to PCI hardware...
-#define	PCI_CONF_REG_INDEX	0xcf8
+ */     
-#define	PCI_CONF_REG_DATA	0xcfc
+extern uint8_t pci_ppc_read_config8(unsigned char, int, int);
-#define CONFIG_ADDR(bus,devfn,where) (((bus) << 16) | ((devfn) << 8) | (where))
+extern uint16_t pci_ppc_read_config16(unsigned char, int, int);
+extern uint32_t pci_ppc_read_config32(unsigned char, int, int);
+extern int pci_ppc_write_config8(unsigned char, int, int, uint8_t);
+extern int pci_ppc_write_config16(unsigned char, int, int, uint16_t);
+extern int pci_ppc_write_config32(unsigned char, int, int, uint32_t);
 
-#endif
+#define CONFIG_CMD(bus,devfn,where) \
+                ((bus << 16) | (devfn << 8) | (where & ~3) | 0x80000000)
+
+#endif /* _PCICONF_H */

src/arch/ppc/include/board.h

@@ -0,0 +1,9 @@
+#ifndef _BOARD_H
+#define _BOARD_H
+
+/*
+ * Provided for all PPC boards to do board-level initialization. This
+ * happens prior to entry into hardwaremain().
+ */
+extern void board_init(void);
+#endif /* _BOARD_H */

src/arch/ppc/include/printk.h

@@ -0,0 +1,18 @@
+#ifndef _PRINTK_H
+#define _PRINTK_H
+#include <console/loglevel.h>
+
+extern int do_printk(int, const char *, ...);
+
+#define printk_emerg(fmt, arg...)   do_printk(BIOS_EMERG   ,fmt, ##arg)
+#define printk_alert(fmt, arg...)   do_printk(BIOS_ALERT   ,fmt, ##arg)
+#define printk_crit(fmt, arg...)    do_printk(BIOS_CRIT    ,fmt, ##arg)
+#define printk_err(fmt, arg...)     do_printk(BIOS_ERR     ,fmt, ##arg)
+#define printk_warning(fmt, arg...) do_printk(BIOS_WARNING ,fmt, ##arg)
+#define printk_notice(fmt, arg...)  do_printk(BIOS_NOTICE  ,fmt, ##arg)
+#define printk_info(fmt, arg...)    do_printk(BIOS_INFO    ,fmt, ##arg)
+#define printk_debug(fmt, arg...)   do_printk(BIOS_DEBUG   ,fmt, ##arg)
+#define printk_spew(fmt, arg...)    do_printk(BIOS_SPEW    ,fmt, ##arg)
+
+#endif /* _PRINTK_H */
+

src/arch/ppc/include/sdram.h

@@ -2,7 +2,7 @@
 #define _SDRAM_H
 
 /*
- * Provided for all PPC boards to to SDRAM initialization. This
+ * Provided for all PPC boards to do SDRAM initialization. This
  * happens prior to entry into hardwaremain().
  */
 extern void sdram_init(void);

src/arch/ppc/init/ppc_main.c

@@ -3,6 +3,7 @@
  * gwatson@lanl.gov
  */
 
+#include <board.h>
 #include <sdram.h>
 
 extern unsigned _iseg[];

src/mainboard/motorola/sandpoint/init.c

@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2003, Greg Watson <gwatson@lanl.gov>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Do very early board initialization:
+ *
+ * - Configure External Bus (EBC)
+ * - Setup Flash
+ * - Setup NVRTC
+ * - Setup Board Control and Status Registers (BCSR)
+ * - Enable UART0 for debugging
+ */
+
+#include <ppc_asm.tmpl>
+#include <ppc.h>
+#include <arch/io.h>
+
+void pnp_output(char address, char data)
+{
+	outb(address, PNP_CFGADDR);
+	outb(data, PNP_CFGDATA);
+}
+
+void
+board_init(void)
+{
+	/*
+	 * Configure FLASH
+	 */
+
+	/*
+	 * Configure NVTRC/BCSR
+	 */
+	
+	/*
+	 * Enable UART0
+	 */
+	pnp_output(0x07, 6); /* LD 6 = UART0 */
+	pnp_output(0x30, 0); /* Dectivate */
+	pnp_output(0x60, TTYS0_BASE >> 8); /* IO Base */
+	pnp_output(0x61, TTYS0_BASE & 0xFF); /* IO Base */
+	pnp_output(0x30, 1); /* Activate */
+	uart8250_init(UART0_IO_BASE, 115200/TTYS0_BAUD, TTYS0_LCS);
+}