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soc/intel/braswell: Don't reinitialize SPI after lockdown 

With the common southbridge SPI code reinitialization after lockdown
is not necessary, hence the SMM finalize call becomes a no-op.

Change-Id: I9fae28185470f4d25ef1818627eb76ac38cf100b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36006
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans 2019-10-13 23:14:08 +02:00 committed by Patrick Georgi
parent 56d913eedb
commit 91eb2816fa
2 changed files with 0 additions and 23 deletions
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19
src/soc/intel/braswell/smihandler.c
View File

@ -280,22 +280,6 @@ static void southbridge_smi_gsmi(void)
*ret = gsmi_exec(sub_command, param);
}
static void finalize(void)
{
static int finalize_done;
if (finalize_done) {
printk(BIOS_DEBUG, "SMM already finalized.\n");
return;
}
finalize_done = 1;
#if CONFIG(SPI_FLASH_SMM)
/* Re-init SPI driver to handle locked BAR */
spi_init();
#endif
}
static void southbridge_smi_apmc(void)
{
uint8_t reg8;
@ -347,9 +331,6 @@ static void southbridge_smi_apmc(void)
if (CONFIG(ELOG_GSMI))
southbridge_smi_gsmi();
break;
case APM_CNT_FINALIZE:
finalize();
break;
}
mainboard_smi_apmc(reg8);

4
src/soc/intel/braswell/southcluster.c
View File

@ -650,10 +650,6 @@ static void finalize_chipset(void *unused)
write32(spi + UVSCC, cfg.uvscc);
write32(spi + LVSCC, cfg.lvscc | VCL);
}
spi_init();
printk(BIOS_DEBUG, "Finalizing SMM.\n");
outb(APM_CNT_FINALIZE, APM_CNT);
}
BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, finalize_chipset, NULL);