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drivers: Replace multiple fill_lb_framebuffer with single instance 

Currently it's not possible to add multiple graphics drivers into
one coreboot image. This patch series will fix this issue by providing
a single API that multiple graphics drivers can use.

This is required for platforms that have two graphic cards, but
different graphic drivers, like Intel+Aspeed on server platforms or
Intel+Nvidia on consumer notebooks.

The goal is to remove duplicated fill_fb_framebuffer(), the advertisment
of multiple independent framebuffers in coreboot tables, and better
runtime/build time graphic configuration options.

Replace all duplications of fill_fb_framebuffer and provide a single one
in edid_fill_fb.c. Should not change the current behaviour as still only
one graphic driver can be active at time.

Change-Id: Ife507f7e7beaf59854e533551b4b87ea6980c1f4
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39003
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Rudolph 2020-02-19 12:54:06 +01:00 committed by Patrick Rudolph
parent a3495c0d7b
commit 92106b1666
14 changed files with 142 additions and 252 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

52
src/device/oprom/realmode/x86.c
View File

@ -12,6 +12,7 @@
#include <pc80/i8254.h>
#include <string.h>
#include <vbe.h>
#include <framebuffer_info.h>
/* we use x86emu's register file representation */
#include <x86emu/regs.h>
@ -208,11 +209,6 @@ static void setup_realmode_idt(void)
static vbe_mode_info_t mode_info;
static int mode_info_valid;
static int vbe_mode_info_valid(void)
{
return mode_info_valid;
}
const vbe_mode_info_t *vbe_mode_info(void)
{
if (!mode_info_valid || !mode_info.vesa.phys_base_ptr)
@ -351,6 +347,24 @@ void vbe_set_graphics(void)
}
vbe_set_mode(&mode_info);
const struct lb_framebuffer fb = {
.physical_address = mode_info.vesa.phys_base_ptr,
.x_resolution = le16_to_cpu(mode_info.vesa.x_resolution),
.y_resolution = le16_to_cpu(mode_info.vesa.y_resolution),
.bytes_per_line = le16_to_cpu(mode_info.vesa.bytes_per_scanline),
.bits_per_pixel = mode_info.vesa.bits_per_pixel,
.red_mask_pos = mode_info.vesa.red_mask_pos,
.red_mask_size = mode_info.vesa.red_mask_size,
.green_mask_pos = mode_info.vesa.green_mask_pos,
.green_mask_size = mode_info.vesa.green_mask_size,
.blue_mask_pos = mode_info.vesa.blue_mask_pos,
.blue_mask_size = mode_info.vesa.blue_mask_size,
.reserved_mask_pos = mode_info.vesa.reserved_mask_pos,
.reserved_mask_size = mode_info.vesa.reserved_mask_size,
.orientation = LB_FB_ORIENTATION_NORMAL,
};
fb_add_framebuffer_info_ex(&fb);
}
void vbe_textmode_console(void)
@ -362,34 +376,6 @@ void vbe_textmode_console(void)
die("\nError: In %s function\n", __func__);
}
int fill_lb_framebuffer(struct lb_framebuffer *framebuffer)
{
if (!vbe_mode_info_valid())
return -1;
framebuffer->physical_address = mode_info.vesa.phys_base_ptr;
framebuffer->x_resolution = le16_to_cpu(mode_info.vesa.x_resolution);
framebuffer->y_resolution = le16_to_cpu(mode_info.vesa.y_resolution);
framebuffer->bytes_per_line =
le16_to_cpu(mode_info.vesa.bytes_per_scanline);
framebuffer->bits_per_pixel = mode_info.vesa.bits_per_pixel;
framebuffer->red_mask_pos = mode_info.vesa.red_mask_pos;
framebuffer->red_mask_size = mode_info.vesa.red_mask_size;
framebuffer->green_mask_pos = mode_info.vesa.green_mask_pos;
framebuffer->green_mask_size = mode_info.vesa.green_mask_size;
framebuffer->blue_mask_pos = mode_info.vesa.blue_mask_pos;
framebuffer->blue_mask_size = mode_info.vesa.blue_mask_size;
framebuffer->reserved_mask_pos = mode_info.vesa.reserved_mask_pos;
framebuffer->reserved_mask_size = mode_info.vesa.reserved_mask_size;
return 0;
}
#endif
void run_bios(struct device *dev, unsigned long addr)

48
src/device/oprom/yabel/vbe.c
View File

@ -33,6 +33,7 @@
*****************************************************************************/
#include <boot/coreboot_tables.h>
#include <framebuffer_info.h>
#include <string.h>
#include <types.h>
@ -163,11 +164,6 @@ vbe_info(vbe_info_t * info)
static int mode_info_valid;
static int vbe_mode_info_valid(void)
{
return mode_info_valid;
}
// VBE Function 01h
static u8
vbe_get_mode_info(vbe_mode_info_t * mode_info)
@ -747,33 +743,25 @@ void vbe_set_graphics(void)
mode_info.video_mode = (1 << 14) | CONFIG_FRAMEBUFFER_VESA_MODE;
vbe_get_mode_info(&mode_info);
vbe_set_mode(&mode_info);
}
int fill_lb_framebuffer(struct lb_framebuffer *framebuffer)
{
if (!vbe_mode_info_valid())
return -1;
const struct lb_framebuffer fb = {
.physical_address = mode_info.vesa.phys_base_ptr,
.x_resolution = le16_to_cpu(mode_info.vesa.x_resolution),
.y_resolution = le16_to_cpu(mode_info.vesa.y_resolution),
.bytes_per_line = le16_to_cpu(mode_info.vesa.bytes_per_scanline),
.bits_per_pixel = mode_info.vesa.bits_per_pixel,
.red_mask_pos = mode_info.vesa.red_mask_pos,
.red_mask_size = mode_info.vesa.red_mask_size,
.green_mask_pos = mode_info.vesa.green_mask_pos,
.green_mask_size = mode_info.vesa.green_mask_size,
.blue_mask_pos = mode_info.vesa.blue_mask_pos,
.blue_mask_size = mode_info.vesa.blue_mask_size,
.reserved_mask_pos = mode_info.vesa.reserved_mask_pos,
.reserved_mask_size = mode_info.vesa.reserved_mask_size,
.orientation = LB_FB_ORIENTATION_NORMAL,
};
framebuffer->physical_address = le32_to_cpu(mode_info.vesa.phys_base_ptr);
framebuffer->x_resolution = le16_to_cpu(mode_info.vesa.x_resolution);
framebuffer->y_resolution = le16_to_cpu(mode_info.vesa.y_resolution);
framebuffer->bytes_per_line = le16_to_cpu(mode_info.vesa.bytes_per_scanline);
framebuffer->bits_per_pixel = mode_info.vesa.bits_per_pixel;
framebuffer->red_mask_pos = mode_info.vesa.red_mask_pos;
framebuffer->red_mask_size = mode_info.vesa.red_mask_size;
framebuffer->green_mask_pos = mode_info.vesa.green_mask_pos;
framebuffer->green_mask_size = mode_info.vesa.green_mask_size;
framebuffer->blue_mask_pos = mode_info.vesa.blue_mask_pos;
framebuffer->blue_mask_size = mode_info.vesa.blue_mask_size;
framebuffer->reserved_mask_pos = mode_info.vesa.reserved_mask_pos;
framebuffer->reserved_mask_size = mode_info.vesa.reserved_mask_size;
return 0;
fb_add_framebuffer_info_ex(&fb);
}
void vbe_textmode_console(void)

1
src/drivers/intel/fsp1_1/Makefile.inc
View File

@ -18,7 +18,6 @@ romstage-y += raminit.c
romstage-y += romstage.c
romstage-$(CONFIG_MMA) += mma_core.c
ramstage-$(CONFIG_RUN_FSP_GOP) += fsp_gop.c
ramstage-y += fsp_relocate.c
ramstage-y += fsp_util.c
ramstage-y += hob.c

38
src/drivers/intel/fsp1_1/fsp_gop.c
View File

@ -1,38 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <boot/coreboot_tables.h>
#include <console/console.h>
#include <fsp/util.h>
int fill_lb_framebuffer(struct lb_framebuffer *framebuffer)
{
VOID *hob_list_ptr;
hob_list_ptr = get_hob_list();
const EFI_GUID vbt_guid = EFI_PEI_GRAPHICS_INFO_HOB_GUID;
u32 *vbt_hob;
EFI_PEI_GRAPHICS_INFO_HOB *vbt_gop;
vbt_hob = get_next_guid_hob(&vbt_guid, hob_list_ptr);
if (vbt_hob == NULL) {
printk(BIOS_ERR, "FSP_ERR: Graphics Data HOB is not present\n");
return -1;
}
printk(BIOS_DEBUG, "FSP_DEBUG: Graphics Data HOB present\n");
vbt_gop = GET_GUID_HOB_DATA(vbt_hob);
framebuffer->physical_address = vbt_gop->FrameBufferBase;
framebuffer->x_resolution = vbt_gop->GraphicsMode.HorizontalResolution;
framebuffer->y_resolution = vbt_gop->GraphicsMode.VerticalResolution;
framebuffer->bytes_per_line = vbt_gop->GraphicsMode.PixelsPerScanLine
* 4;
framebuffer->bits_per_pixel = 32;
framebuffer->red_mask_pos = 16;
framebuffer->red_mask_size = 8;
framebuffer->green_mask_pos = 8;
framebuffer->green_mask_size = 8;
framebuffer->blue_mask_pos = 0;
framebuffer->blue_mask_size = 8;
framebuffer->reserved_mask_pos = 24;
framebuffer->reserved_mask_size = 8;
return 0;
}

23
src/drivers/intel/fsp1_1/ramstage.c
View File

@ -5,6 +5,7 @@
#include <console/console.h>
#include <fsp/ramstage.h>
#include <fsp/util.h>
#include <framebuffer_info.h>
#include <lib.h>
#include <stage_cache.h>
#include <string.h>
@ -116,6 +117,28 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
gfx_set_init_done(1);
#endif
if (CONFIG(RUN_FSP_GOP)) {
const EFI_GUID vbt_guid = EFI_PEI_GRAPHICS_INFO_HOB_GUID;
u32 *vbt_hob;
void *hob_list_ptr = get_hob_list();
vbt_hob = get_next_guid_hob(&vbt_guid, hob_list_ptr);
if (vbt_hob == NULL) {
printk(BIOS_ERR, "FSP_ERR: Graphics Data HOB is not present\n");
} else {
EFI_PEI_GRAPHICS_INFO_HOB *gop;
printk(BIOS_DEBUG, "FSP_DEBUG: Graphics Data HOB present\n");
gop = GET_GUID_HOB_DATA(vbt_hob);
fb_add_framebuffer_info(gop->FrameBufferBase,
gop->GraphicsMode.HorizontalResolution,
gop->GraphicsMode.VerticalResolution,
gop->GraphicsMode.PixelsPerScanLine * 4,
32);
}
}
display_hob_info(fsp_info_header);
soc_after_silicon_init();
}

85
src/drivers/intel/fsp2_0/graphics.c
View File

@ -2,9 +2,11 @@
#include <boot/coreboot_tables.h>
#include <console/console.h>
#include <fsp/graphics.h>
#include <fsp/util.h>
#include <soc/intel/common/vbt.h>
#include <types.h>
#include <framebuffer_info.h>
enum pixel_format {
pixel_rgbx_8bpc = 0,
@ -46,75 +48,54 @@ static const struct fsp_framebuffer {
[pixel_bgrx_8bpc] = { {16, 8}, {8, 8}, {0, 8}, {24, 8} },
};
enum cb_err fsp_fill_lb_framebuffer(struct lb_framebuffer *framebuffer)
void fsp_report_framebuffer_info(const uintptr_t framebuffer_bar)
{
size_t size;
const struct hob_graphics_info *ginfo;
const struct fsp_framebuffer *fbinfo;
/*
* Pci enumeration happens after silicon init.
* After enumeration graphic framebuffer base may be relocated.
*/
if (!framebuffer_bar) {
printk(BIOS_ALERT, "Framebuffer BAR invalid\n");
return;
}
ginfo = fsp_find_extension_hob_by_guid(fsp_graphics_info_guid, &size);
if (!ginfo) {
printk(BIOS_ALERT, "Graphics hand-off block not found\n");
return CB_ERR;
return;
}
if (ginfo->pixel_format >= ARRAY_SIZE(fsp_framebuffer_format_map)) {
printk(BIOS_ALERT, "FSP set unknown framebuffer format: %d\n",
ginfo->pixel_format);
return CB_ERR;
return;
}
fbinfo = fsp_framebuffer_format_map + ginfo->pixel_format;
framebuffer->physical_address = ginfo->framebuffer_base;
framebuffer->x_resolution = ginfo->horizontal_resolution;
framebuffer->y_resolution = ginfo->vertical_resolution;
framebuffer->bytes_per_line = ginfo->pixels_per_scanline * 4;
framebuffer->bits_per_pixel = 32;
framebuffer->red_mask_pos = fbinfo->red.pos;
framebuffer->red_mask_size = fbinfo->red.size;
framebuffer->green_mask_pos = fbinfo->green.pos;
framebuffer->green_mask_size = fbinfo->green.size;
framebuffer->blue_mask_pos = fbinfo->blue.pos;
framebuffer->blue_mask_size = fbinfo->blue.size;
framebuffer->reserved_mask_pos = fbinfo->rsvd.pos;
framebuffer->reserved_mask_size = fbinfo->rsvd.pos;
const struct lb_framebuffer fb = {
.physical_address = framebuffer_bar,
.x_resolution = ginfo->horizontal_resolution,
.y_resolution = ginfo->vertical_resolution,
.bytes_per_line = ginfo->pixels_per_scanline * 4,
.bits_per_pixel = fbinfo->rsvd.size + fbinfo->red.size +
fbinfo->green.size + fbinfo->blue.size,
.red_mask_pos = fbinfo->red.pos,
.red_mask_size = fbinfo->red.size,
.green_mask_pos = fbinfo->green.pos,
.green_mask_size = fbinfo->green.size,
.blue_mask_pos = fbinfo->blue.pos,
.blue_mask_size = fbinfo->blue.size,
.reserved_mask_pos = fbinfo->rsvd.pos,
.reserved_mask_size = fbinfo->rsvd.size,
.orientation = LB_FB_ORIENTATION_NORMAL,
};
return CB_SUCCESS;
}
int fill_lb_framebuffer(struct lb_framebuffer *framebuffer)
{
enum cb_err ret;
uintptr_t framebuffer_bar;
/* Pci enumeration happens after silicon init.
* After enumeration graphic framebuffer base may be relocated.
* Get framebuffer base from soc.
*/
framebuffer_bar = fsp_soc_get_igd_bar();
if (!framebuffer_bar) {
printk(BIOS_ALERT, "Framebuffer BAR invalid\n");
return -1;
}
ret = fsp_fill_lb_framebuffer(framebuffer);
if (ret != CB_SUCCESS) {
printk(BIOS_ALERT, "FSP did not return a valid framebuffer\n");
return -1;
}
/* Resource allocator can move the BAR around after FSP configures it */
framebuffer->physical_address = framebuffer_bar;
printk(BIOS_DEBUG, "Graphics framebuffer located at 0x%llx\n",
framebuffer->physical_address);
return 0;
}
__weak uintptr_t fsp_soc_get_igd_bar(void)
{
return 0;
fb_add_framebuffer_info_ex(&fb);
}

16
src/drivers/intel/fsp2_0/include/fsp/graphics.h Normal file
View File

@ -0,0 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef _FSP2_0_GRAPHICS_H_
#define _FSP2_0_GRAPHICS_H_
#include <types.h>
/*
* Report the fsp_graphics_info_guid HOB to framebuffer info.
*
* Must be called after PCI enumeration to make sure that the BAR
* doesn't change any more.
*/
void fsp_report_framebuffer_info(const uintptr_t framebuffer_bar);
#endif /* _FSP2_0_GRAPHICS_H_ */

4
src/drivers/intel/fsp2_0/include/fsp/util.h
View File

@ -88,7 +88,6 @@ const void *fsp_get_hob_list(void);
void *fsp_get_hob_list_ptr(void);
const void *fsp_find_extension_hob_by_guid(const uint8_t *guid, size_t *size);
const void *fsp_find_nv_storage_data(size_t *size);
enum cb_err fsp_fill_lb_framebuffer(struct lb_framebuffer *framebuffer);
int fsp_find_range_hob(struct range_entry *re, const uint8_t guid[16]);
void fsp_display_fvi_version_hob(void);
void fsp_find_reserved_memory(struct range_entry *re);
@ -123,9 +122,6 @@ struct fsp_load_descriptor {
* header object will be validated and filled in on successful load. */
enum cb_err fsp_load_component(struct fsp_load_descriptor *fspld, struct fsp_header *hdr);
/* Get igd framebuffer bar from SoC */
uintptr_t fsp_soc_get_igd_bar(void);
/*
* Handle FSP reboot request status. Chipset/soc is expected to provide
* chipset_handle_reset() that deals with reset type codes specific to given

30
src/drivers/intel/gma/gma-gfx_init.ads
View File

@ -13,28 +13,14 @@ is
----------------------------------------------------------------------------
type lb_framebuffer is record
tag : word32;
size : word32;
function c_fb_add_framebuffer_info
(fb_addr: Interfaces.C.size_t;
x_resolution : word32;
y_resolution : word32;
bytes_per_line : word32;
bits_per_pixel : word8)
return Interfaces.C.size_t;
physical_address : word64;
x_resolution : word32;
y_resolution : word32;
bytes_per_line : word32;
bits_per_pixel : word8;
red_mask_pos : word8;
red_mask_size : word8;
green_mask_pos : word8;
green_mask_size : word8;
blue_mask_pos : word8;
blue_mask_size : word8;
reserved_mask_pos : word8;
reserved_mask_size : word8;
end record;
function fill_lb_framebuffer
(framebuffer : in out lb_framebuffer)
return Interfaces.C.int;
pragma Export (C, fill_lb_framebuffer, "fill_lb_framebuffer");
pragma import (C, c_fb_add_framebuffer_info, "fb_add_framebuffer_info");
end GMA.GFX_Init;

59
src/drivers/intel/gma/hires_fb/gma-gfx_init.adb
View File

@ -18,56 +18,29 @@ with GMA.Mainboard;
package body GMA.GFX_Init
is
fb_valid : boolean := false;
linear_fb_addr : word64;
fb : Framebuffer_Type;
function fill_lb_framebuffer
(framebuffer : in out lb_framebuffer)
return Interfaces.C.int
is
use type word32;
use type Interfaces.C.int;
begin
if fb_valid then
framebuffer :=
(tag => 0,
size => 0,
physical_address => linear_fb_addr,
x_resolution => word32 (fb.Width),
y_resolution => word32 (fb.Height),
bytes_per_line => 4 * word32 (fb.Stride),
bits_per_pixel => 32,
reserved_mask_pos => 24,
reserved_mask_size => 8,
red_mask_pos => 16,
red_mask_size => 8,
green_mask_pos => 8,
green_mask_size => 8,
blue_mask_pos => 0,
blue_mask_size => 8);
return 0;
else
return -1;
end if;
end fill_lb_framebuffer;
----------------------------------------------------------------------------
procedure gfxinit (lightup_ok : out Interfaces.C.int)
is
use type pos32;
use type word64;
use type word32;
use type Interfaces.C.size_t;
ports : Port_List;
configs : Pipe_Configs;
success : boolean;
linear_fb_addr : word64;
fb : Framebuffer_Type;
min_h : pos32 := Config.LINEAR_FRAMEBUFFER_MAX_WIDTH;
min_v : pos32 := Config.LINEAR_FRAMEBUFFER_MAX_HEIGHT;
fbinfo : Interfaces.C.size_t;
begin
lightup_ok := 0;
@ -108,9 +81,17 @@ is
HW.GFX.GMA.Update_Outputs (configs);
HW.GFX.GMA.Map_Linear_FB (linear_fb_addr, fb);
fb_valid := linear_fb_addr /= 0;
lightup_ok := (if fb_valid then 1 else 0);
if linear_fb_addr /= 0 then
fbinfo := c_fb_add_framebuffer_info
(fb_addr => Interfaces.C.size_t (linear_fb_addr),
x_resolution => word32 (fb.Width),
y_resolution => word32 (fb.Height),
bytes_per_line => word32 (fb.Stride) * 4,
bits_per_pixel => 32);
if fbinfo /= 0 then
lightup_ok := 1;
end if;
end if;
end if;
end if;
end if;

11
src/drivers/intel/gma/text_fb/gma-gfx_init.adb
View File

@ -13,17 +13,6 @@ with GMA.Mainboard;
package body GMA.GFX_Init
is
function fill_lb_framebuffer
(framebuffer : in out lb_framebuffer)
return Interfaces.C.int
is
use type Interfaces.C.int;
begin
return -1;
end fill_lb_framebuffer;
----------------------------------------------------------------------------
procedure gfxinit (lightup_ok : out Interfaces.C.int)
is
ports : Port_List;

8
src/lib/Kconfig
View File

@ -5,14 +5,6 @@ config MISSING_BOARD_RESET
implementation. This activates a stub that logs the missing
board reset and halts execution.
config NO_EDID_FILL_FB
bool
default y if !MAINBOARD_DO_NATIVE_VGA_INIT
help
Don't include default fill_lb_framebuffer() implementation. Select
this if your drivers uses MAINBOARD_DO_NATIVE_VGA_INIT but provides
its own fill_lb_framebuffer() implementation.
config RAMSTAGE_ADA
bool
help

2
src/lib/Makefile.inc
View File

@ -144,9 +144,7 @@ ramstage-$(CONFIG_BOOTSPLASH) += jpeg.c
ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
ramstage-$(CONFIG_COVERAGE) += libgcov.c
ramstage-y += edid.c
ifneq ($(CONFIG_NO_EDID_FILL_FB),y)
ramstage-y += edid_fill_fb.c
endif
ramstage-y += memrange.c
ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c
ramstage-$(CONFIG_TIMER_QUEUE) += timer_queue.c

17
src/soc/intel/common/block/graphics/graphics.c
View File

@ -11,6 +11,7 @@
#include <drivers/intel/gma/libgfxinit.h>
#include <drivers/intel/gma/opregion.h>
#include <intelblocks/graphics.h>
#include <fsp/graphics.h>
#include <soc/pci_devs.h>
#include <types.h>
@ -46,13 +47,15 @@ static void gma_init(struct device *const dev)
/*
* GFX PEIM module inside FSP binary is taking care of graphics
* initialization based on RUN_FSP_GOP Kconfig option and input
* VBT file.
* VBT file. Need to report the framebuffer info after PCI enumeration.
*
* In case of non-FSP solution, SoC need to select another
* Kconfig to perform GFX initialization.
*/
if (CONFIG(RUN_FSP_GOP))
if (CONFIG(RUN_FSP_GOP)) {
fsp_report_framebuffer_info(graphics_get_memory_base());
return;
}
if (!CONFIG(NO_GFX_INIT))
pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
@ -155,16 +158,6 @@ void graphics_gtt_rmw(unsigned long reg, uint32_t andmask, uint32_t ormask)
graphics_gtt_write(reg, val);
}
/*
* fsp_soc_get_igd_bar() is declared in <fsp/util.h>,
* but that draws incompatible UDK headers in.
*/
uintptr_t fsp_soc_get_igd_bar(void);
uintptr_t fsp_soc_get_igd_bar(void)
{
return graphics_get_memory_base();
}
static const struct device_operations graphics_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,