mb/google/poppy/variants: Set VmxEnable to 1
This change sets VmxEnable to 1 to match the kernel setting. If this feature is enabled at the kernel level and not in FSP, then there is an issue where FSP expects it to be disabled so it forces a cold reboot on every warm reboot. BUG=b:78129261 BRANCH=poppy Change-Id: Idedbde1d8eb0c9e959733b7b50e5dec804d61cae Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/25698 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -59,6 +59,7 @@ chip soc/intel/skylake
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register "PmConfigSlpSusMinAssert" = "1" # 500ms
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register "PmConfigSlpSusMinAssert" = "1" # 500ms
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register "PmConfigSlpAMinAssert" = "3" # 2s
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register "PmConfigSlpAMinAssert" = "3" # 2s
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register "PmTimerDisabled" = "1"
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register "PmTimerDisabled" = "1"
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register "VmxEnable" = "1"
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register "pirqa_routing" = "PCH_IRQ11"
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register "pirqa_routing" = "PCH_IRQ11"
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register "pirqb_routing" = "PCH_IRQ10"
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register "pirqb_routing" = "PCH_IRQ10"
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@ -58,6 +58,7 @@ chip soc/intel/skylake
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register "PmConfigSlpSusMinAssert" = "1" # 500ms
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register "PmConfigSlpSusMinAssert" = "1" # 500ms
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register "PmConfigSlpAMinAssert" = "3" # 2s
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register "PmConfigSlpAMinAssert" = "3" # 2s
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register "PmTimerDisabled" = "1"
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register "PmTimerDisabled" = "1"
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register "VmxEnable" = "1"
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register "pirqa_routing" = "PCH_IRQ11"
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register "pirqa_routing" = "PCH_IRQ11"
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register "pirqb_routing" = "PCH_IRQ10"
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register "pirqb_routing" = "PCH_IRQ10"
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@ -59,6 +59,7 @@ chip soc/intel/skylake
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register "PmConfigSlpSusMinAssert" = "1" # 500ms
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register "PmConfigSlpSusMinAssert" = "1" # 500ms
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register "PmConfigSlpAMinAssert" = "3" # 2s
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register "PmConfigSlpAMinAssert" = "3" # 2s
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register "PmTimerDisabled" = "1"
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register "PmTimerDisabled" = "1"
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register "VmxEnable" = "1"
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register "pirqa_routing" = "PCH_IRQ11"
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register "pirqa_routing" = "PCH_IRQ11"
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register "pirqb_routing" = "PCH_IRQ10"
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register "pirqb_routing" = "PCH_IRQ10"
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@ -59,6 +59,7 @@ chip soc/intel/skylake
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register "PmConfigSlpSusMinAssert" = "1" # 500ms
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register "PmConfigSlpSusMinAssert" = "1" # 500ms
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register "PmConfigSlpAMinAssert" = "3" # 2s
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register "PmConfigSlpAMinAssert" = "3" # 2s
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register "PmTimerDisabled" = "1"
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register "PmTimerDisabled" = "1"
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register "VmxEnable" = "1"
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register "pirqa_routing" = "PCH_IRQ11"
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register "pirqa_routing" = "PCH_IRQ11"
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register "pirqb_routing" = "PCH_IRQ10"
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register "pirqb_routing" = "PCH_IRQ10"
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