mb/google,intel: Use common ChromeEC code for SMI APMC
Change-Id: If4b7c2b94e0fec84831740336ccdbea0922ffbfe Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74513 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
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@ -7,6 +7,7 @@
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#include <soc/pm.h>
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#include <elog.h>
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#include <ec/google/chromeec/ec.h>
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#include <ec/google/chromeec/smm.h>
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#include <southbridge/intel/lynxpoint/lp_gpio.h>
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#include <soc/iomap.h>
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#include <soc/nvs.h>
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@ -103,21 +104,6 @@ void mainboard_smi_sleep(u8 slp_typ)
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int mainboard_smi_apmc(u8 apmc)
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{
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switch (apmc) {
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case APM_CNT_ACPI_ENABLE:
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google_chromeec_set_smi_mask(0);
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/* Clear all pending events */
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while (google_chromeec_get_event() != EC_HOST_EVENT_NONE)
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;
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google_chromeec_set_sci_mask(MAINBOARD_EC_SCI_EVENTS);
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break;
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case APM_CNT_ACPI_DISABLE:
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google_chromeec_set_sci_mask(0);
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/* Clear all pending events */
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while (google_chromeec_get_event() != EC_HOST_EVENT_NONE)
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;
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google_chromeec_set_smi_mask(MAINBOARD_EC_SMI_EVENTS);
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break;
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}
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chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS);
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return 0;
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}
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@ -7,6 +7,7 @@
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#include <cpu/x86/smm.h>
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#include "ec.h"
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#include <ec/google/chromeec/ec.h>
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#include <ec/google/chromeec/smm.h>
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#include <elog.h>
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#include <soc/nvs.h>
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#include <soc/pm.h>
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@ -115,21 +116,6 @@ void mainboard_smi_sleep(uint8_t slp_typ)
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int mainboard_smi_apmc(uint8_t apmc)
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{
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switch (apmc) {
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case APM_CNT_ACPI_ENABLE:
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google_chromeec_set_smi_mask(0);
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/* Clear all pending events */
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while (google_chromeec_get_event() != EC_HOST_EVENT_NONE)
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;
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google_chromeec_set_sci_mask(MAINBOARD_EC_SCI_EVENTS);
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break;
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case APM_CNT_ACPI_DISABLE:
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google_chromeec_set_sci_mask(0);
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/* Clear all pending events */
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while (google_chromeec_get_event() != EC_HOST_EVENT_NONE)
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;
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google_chromeec_set_smi_mask(MAINBOARD_EC_SMI_EVENTS);
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break;
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}
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chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS);
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return 0;
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}
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@ -12,6 +12,7 @@
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/* Include EC functions */
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#include <ec/google/chromeec/ec.h>
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#include <ec/google/chromeec/smm.h>
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#include "ec.h"
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static u8 mainboard_smi_ec(void)
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@ -78,21 +79,6 @@ void mainboard_smi_sleep(u8 slp_typ)
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int mainboard_smi_apmc(u8 apmc)
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{
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switch (apmc) {
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case APM_CNT_ACPI_ENABLE:
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google_chromeec_set_smi_mask(0);
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/* Clear all pending events */
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while (google_chromeec_get_event() != EC_HOST_EVENT_NONE)
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;
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google_chromeec_set_sci_mask(LINK_EC_SCI_EVENTS);
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break;
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case APM_CNT_ACPI_DISABLE:
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google_chromeec_set_sci_mask(0);
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/* Clear all pending events */
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while (google_chromeec_get_event() != EC_HOST_EVENT_NONE)
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;
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google_chromeec_set_smi_mask(LINK_EC_SMI_EVENTS);
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break;
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}
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chromeec_smi_apmc(apmc, LINK_EC_SCI_EVENTS, LINK_EC_SMI_EVENTS);
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return 0;
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}
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@ -7,6 +7,7 @@
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#include <elog.h>
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#include <ec/google/chromeec/ec.h>
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#include <ec/google/chromeec/smm.h>
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#include "ec.h"
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#include <soc/nvs.h>
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@ -90,21 +91,6 @@ void mainboard_smi_sleep(uint8_t slp_typ)
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int mainboard_smi_apmc(uint8_t apmc)
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{
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switch (apmc) {
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case APM_CNT_ACPI_ENABLE:
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google_chromeec_set_smi_mask(0);
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/* Clear all pending events */
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while (google_chromeec_get_event() != EC_HOST_EVENT_NONE)
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;
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google_chromeec_set_sci_mask(MAINBOARD_EC_SCI_EVENTS);
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break;
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case APM_CNT_ACPI_DISABLE:
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google_chromeec_set_sci_mask(0);
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/* Clear all pending events */
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while (google_chromeec_get_event() != EC_HOST_EVENT_NONE)
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;
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google_chromeec_set_smi_mask(MAINBOARD_EC_SMI_EVENTS);
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break;
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}
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chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS);
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return 0;
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}
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@ -14,6 +14,7 @@
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/* Include EC functions */
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#include <ec/google/chromeec/ec.h>
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#include <ec/google/chromeec/smm.h>
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#include "ec.h"
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/* Codec enable: GPIO45 */
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@ -106,21 +107,6 @@ void mainboard_smi_sleep(u8 slp_typ)
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int mainboard_smi_apmc(u8 apmc)
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{
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switch (apmc) {
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case APM_CNT_ACPI_ENABLE:
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google_chromeec_set_smi_mask(0);
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/* Clear all pending events */
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while (google_chromeec_get_event() != EC_HOST_EVENT_NONE)
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;
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google_chromeec_set_sci_mask(MAINBOARD_EC_SCI_EVENTS);
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break;
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case APM_CNT_ACPI_DISABLE:
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google_chromeec_set_sci_mask(0);
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/* Clear all pending events */
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while (google_chromeec_get_event() != EC_HOST_EVENT_NONE)
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;
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google_chromeec_set_smi_mask(MAINBOARD_EC_SMI_EVENTS);
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break;
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}
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chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS);
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return 0;
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}
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@ -7,6 +7,7 @@
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#include "ec.h"
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#include <ec/google/chromeec/ec.h>
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#include <ec/google/chromeec/smm.h>
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#include <elog.h>
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#include <soc/nvs.h>
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@ -100,21 +101,6 @@ void mainboard_smi_sleep(uint8_t slp_typ)
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int mainboard_smi_apmc(uint8_t apmc)
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{
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switch (apmc) {
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case APM_CNT_ACPI_ENABLE:
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google_chromeec_set_smi_mask(0);
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/* Clear all pending events */
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while (google_chromeec_get_event() != EC_HOST_EVENT_NONE)
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;
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google_chromeec_set_sci_mask(MAINBOARD_EC_SCI_EVENTS);
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break;
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case APM_CNT_ACPI_DISABLE:
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google_chromeec_set_sci_mask(0);
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/* Clear all pending events */
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while (google_chromeec_get_event() != EC_HOST_EVENT_NONE)
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;
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google_chromeec_set_smi_mask(MAINBOARD_EC_SMI_EVENTS);
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break;
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}
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chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS);
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return 0;
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}
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