soc/nvidia/tegra210: set up the clock of the chosen UART
Don't always set up UARTA, but instead honor CONFIG_CONSOLE_SERIAL_TEGRA210_UARTx and set up the clock of the chosen UART. Now the matching clock for the used UART is set up. (The UART driver uses CONFIG_CONSOLE_SERIAL_TEGRA210_UART_ADDRESS, which in return is already based on CONFIG_CONSOLE_SERIAL_TEGRA210_UARTx.) Change-Id: Ife209d42af83459136a019c21c2a069396ab36db Signed-off-by: Andre Heider <a.heider@gmail.com> Reviewed-on: https://review.coreboot.org/23796 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Julius Werner <jwerner@chromium.org>
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@ -21,6 +21,7 @@
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#include <soc/clk_rst.h>
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#include <soc/clock.h>
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#include <soc/clst_clk.h>
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#include <soc/console_uart.h>
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#include <soc/flow.h>
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#include <soc/maincpu.h>
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#include <soc/pmc.h>
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@ -489,12 +490,15 @@ u32 clock_configure_plld(u32 frequency)
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*/
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void clock_early_uart(void)
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{
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write32(CLK_RST_REG(clk_src_uarta),
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CLK_SRC_DEV_ID(UARTA, PLLP) << CLK_SOURCE_SHIFT |
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if (console_uart_get_id() == UART_ID_NONE)
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return;
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write32(console_uart_clk_rst_reg(),
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console_uart_clk_src_dev_id() << CLK_SOURCE_SHIFT |
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CLK_UART_DIV_OVERRIDE |
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CLK_DIVIDER(TEGRA_PLLP_KHZ, 1843));
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clock_enable_clear_reset_l(CLK_L_UARTA);
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console_uart_clock_enable_clear_reset();
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}
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/* Enable output clock (CLK1~3) for external peripherals. */
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