From 929b65add452952973b59e005fda1ee064900850 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Mon, 19 Apr 2021 01:59:47 +0200 Subject: [PATCH] soc/intel/cannonlake: Merge soc_memory_init_params() into its caller MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit soc_memory_init_params() does not only configure memory init parameters. Despite its name, it also configures many other things. Therefore, merge it into its caller function platform_fsp_memory_init_params_cb() to prevent confusions. Built clevo/l140cu with BUILD_TIMELESS=1. coreboot.rom remains the same. Change-Id: Id3b6395ea5d5cb714a412c856d66d4a9bcbd9c12 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/52491 Reviewed-by: Angel Pons Reviewed-by: Michael Niewöhner Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- .../intel/cannonlake/romstage/fsp_params.c | 19 +++++-------------- 1 file changed, 5 insertions(+), 14 deletions(-) diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c index 5eddf85770..2bb3024e09 100644 --- a/src/soc/intel/cannonlake/romstage/fsp_params.c +++ b/src/soc/intel/cannonlake/romstage/fsp_params.c @@ -17,19 +17,21 @@ #include "../chip.h" -static void soc_memory_init_params(FSPM_UPD *mupd, const config_t *config) +void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) { + const struct device *dev = pcidev_path_on_root(PCH_DEVFN_LPC); + assert(dev != NULL); + const config_t *config = config_of(dev); FSP_M_CONFIG *m_cfg = &mupd->FspmConfig; FSP_M_TEST_CONFIG *tconfig = &mupd->FspmTestConfig; - unsigned int i; uint32_t mask = 0; - const struct device *dev = pcidev_path_on_root(SA_DEVFN_IGD); /* * Probe for no IGD and disable InternalGfx and panel power to prevent a * crash in FSP-M. */ + dev = pcidev_path_on_root(SA_DEVFN_IGD); const bool igd_on = !CONFIG(SOC_INTEL_DISABLE_IGD) && dev && dev->enabled; if (igd_on && pci_read_config16(SA_DEV_IGD, PCI_VENDOR_ID) != 0xffff) { /* Set IGD stolen size to 64MB. */ @@ -131,17 +133,6 @@ static void soc_memory_init_params(FSPM_UPD *mupd, const config_t *config) if (config->DisableHeciRetry) tconfig->DisableHeciRetry = config->DisableHeciRetry; #endif -} - -void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) -{ - const struct device *dev = pcidev_path_on_root(PCH_DEVFN_LPC); - assert(dev != NULL); - const config_t *config = config_of(dev); - FSP_M_CONFIG *m_cfg = &mupd->FspmConfig; - FSP_M_TEST_CONFIG *tconfig = &mupd->FspmTestConfig; - - soc_memory_init_params(mupd, config); /* Enable SMBus controller based on config */ dev = pcidev_path_on_root(PCH_DEVFN_SMBUS);