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soc/intel/cannonlake: Forbid FSP from disabling HECI1 

The functionality of disabling HECI1 device has been moved from the
FSP to coreboot (using `DISABLE_HECI1_AT_PRE_BOOT` config), hence,
always set the `Heci1Disabled` UPD to `0`.

BUG=none
TEST=Boot to OS, verify HECI1 is disabled on hatch system
using coreboot when mainboard selects DISABLE_HECI1_AT_PRE_BOOT config.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ia8908c080ca9991e7a71e795ccb8fc76d99514f8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61455
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
This commit is contained in:
Subrata Banik 2022-01-28 23:24:57 +05:30 committed by Felix Held
parent cfd3224197
commit 92b7815702
1 changed files with 6 additions and 3 deletions
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9
src/soc/intel/cannonlake/fsp_params.c
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@ -586,9 +586,12 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->ScsUfsEnabled = is_devfn_enabled(PCH_DEVFN_UFS); params->ScsUfsEnabled = is_devfn_enabled(PCH_DEVFN_UFS);
params->Heci3Enabled = is_devfn_enabled(PCH_DEVFN_CSE_3); params->Heci3Enabled = is_devfn_enabled(PCH_DEVFN_CSE_3);
#if !CONFIG(HECI_DISABLE_USING_SMM) /*
params->Heci1Disabled = CONFIG(DISABLE_HECI1_AT_PRE_BOOT); * coreboot will handle disabling of HECI1 device if `DISABLE_HECI1_AT_PRE_BOOT`
#endif * config is selected hence, don't let FSP to disable the HECI1 device and set
* the `Heci1Disabled` UPD to `0`.
*/
params->Heci1Disabled = 0;
params->Device4Enable = config->Device4Enable; params->Device4Enable = config->Device4Enable;
/* Teton Glacier hybrid storage support */ /* Teton Glacier hybrid storage support */