diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c
index 8c7f92c842..6c92d03c72 100644
--- a/src/arch/x86/smbios.c
+++ b/src/arch/x86/smbios.c
@@ -449,10 +449,27 @@ static int get_socket_type(void)
 		return 0x13;
 	if (CONFIG(CPU_INTEL_SOCKET_LGA775))
 		return 0x15;
+	if (CONFIG(XEON_SP_COMMON_BASE))
+		return 0x36;
 
 	return 0x02; /* Unknown */
 }
 
+unsigned int __weak smbios_processor_external_clock(void)
+{
+	return 0; /* Unknown */
+}
+
+unsigned int __weak smbios_processor_characteristics(void)
+{
+	return 0;
+}
+
+unsigned int __weak smbios_processor_family(struct cpuid_result res)
+{
+	return (res.eax > 0) ? 0x0c : 0x6;
+}
+
 static int smbios_write_type1(unsigned long *current, int handle)
 {
 	struct smbios_type1 *t = (struct smbios_type1 *)*current;
@@ -528,6 +545,7 @@ static int smbios_write_type4(unsigned long *current, int handle)
 	struct cpuid_result res;
 	struct smbios_type4 *t = (struct smbios_type4 *)*current;
 	int len = sizeof(struct smbios_type4);
+	uint16_t characteristics = 0;
 
 	/* Provide sane defaults even for CPU without CPUID */
 	res.eax = res.edx = 0;
@@ -544,7 +562,7 @@ static int smbios_write_type4(unsigned long *current, int handle)
 	t->processor_id[1] = res.edx;
 	t->processor_manufacturer = smbios_cpu_vendor(t->eos);
 	t->processor_version = smbios_processor_name(t->eos);
-	t->processor_family = (res.eax > 0) ? 0x0c : 0x6;
+	t->processor_family = smbios_processor_family(res);
 	t->processor_type = 3; /* System Processor */
 	/*
 	 * If CPUID leaf 11 is available, calculate "core count" by dividing
@@ -583,10 +601,31 @@ static int smbios_write_type4(unsigned long *current, int handle)
 	if (cpu_have_cpuid() && cpuid_get_max_func() >= 0x16) {
 		t->max_speed = cpuid_ebx(0x16);
 		t->current_speed = cpuid_eax(0x16); /* base frequency */
+		t->external_clock = cpuid_ecx(0x16);
 	} else {
 		t->max_speed = smbios_cpu_get_max_speed_mhz();
 		t->current_speed = smbios_cpu_get_current_speed_mhz();
+		t->external_clock = smbios_processor_external_clock();
 	}
+
+	if (cpu_have_cpuid()) {
+		res = cpuid(1);
+
+		if ((res.ecx) & BIT(5))
+			characteristics |= BIT(6); /* BIT6: Enhanced Virtualization */
+
+		if ((res.edx) & BIT(28))
+			characteristics |= BIT(4); /* BIT4: Hardware Thread */
+
+		if (((cpuid_eax(0x80000000) - 0x80000000) + 1) > 2) {
+			res = cpuid(0x80000001);
+
+			if ((res.edx) & BIT(20))
+				characteristics |= BIT(5); /* BIT5: Execute Protection */
+		}
+	}
+	t->processor_characteristics = characteristics | smbios_processor_characteristics();
+
 	*current += len;
 	return len;
 }
diff --git a/src/include/smbios.h b/src/include/smbios.h
index 013816174b..521339e401 100644
--- a/src/include/smbios.h
+++ b/src/include/smbios.h
@@ -54,6 +54,11 @@ const char *smbios_chassis_version(void);
 const char *smbios_chassis_serial_number(void);
 const char *smbios_processor_serial_number(void);
 
+unsigned int smbios_processor_external_clock(void);
+unsigned int smbios_processor_characteristics(void);
+struct cpuid_result;
+unsigned int smbios_processor_family(struct cpuid_result res);
+
 /* Used by mainboard to add port information of type 8 */
 struct port_information;
 int smbios_write_type8(unsigned long *current, int *handle,
diff --git a/src/mainboard/ocp/deltalake/ramstage.c b/src/mainboard/ocp/deltalake/ramstage.c
index 17f33bd905..69d739f7b2 100644
--- a/src/mainboard/ocp/deltalake/ramstage.c
+++ b/src/mainboard/ocp/deltalake/ramstage.c
@@ -211,6 +211,16 @@ static int mainboard_smbios_data(struct device *dev, int *handle, unsigned long
 }
 #endif
 
+unsigned int smbios_processor_family(struct cpuid_result res)
+{
+	return 0xb3; /* Xeon */
+}
+
+unsigned int smbios_processor_characteristics(void)
+{
+	/* 64-bit Capable, Multi-Core, Power/Performance Control */
+	return 0x8c; /* BIT2 + BIT3 + BIT7 */
+}
 
 static void mainboard_enable(struct device *dev)
 {