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soc/intel/cmn/sa: Introduce `PCIEXBAR_PCIEXBAREN` macro 

Use PCIEXBAR_PCIEXBAREN instead of constant value(1)

Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com>
Change-Id: Ica9e8162945da0a714822c37753914575c26024e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63878
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Wonkyu Kim 2022-04-26 16:36:21 -07:00 committed by Felix Held
parent be345c0bb4
commit 92c1042a35
1 changed files with 5 additions and 3 deletions
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8
src/soc/intel/common/block/systemagent/systemagent_early.c
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@ -69,13 +69,14 @@ void sa_set_pci_bar(const struct sa_mmio_descriptor *fixed_set_resources,
base = pci_read_config32(SA_DEV_ROOT, index);
/* If enabled don't program it. */
if (base & 0x1)
if (base & PCIEXBAR_PCIEXBAREN)
return;
base = fixed_set_resources[i].base;
if (base >> 32)
pci_write_config32(SA_DEV_ROOT, index + 4, base >> 32);
pci_write_config32(SA_DEV_ROOT, index, (base & 0xffffffff) | 1);
pci_write_config32(SA_DEV_ROOT, index,
(base & 0xffffffff) | PCIEXBAR_PCIEXBAREN);
}
}
@ -97,7 +98,8 @@ void sa_set_mch_bar(const struct sa_mmio_descriptor *fixed_set_resources,
index = fixed_set_resources[i].index;
if (base >> 32)
write32((void *)(uintptr_t)(MCH_BASE_ADDRESS + index + 4), base >> 32);
write32((void *)(uintptr_t)(MCH_BASE_ADDRESS + index), (base & 0xffffffff) | 1);
write32((void *)(uintptr_t)(MCH_BASE_ADDRESS + index),
(base & 0xffffffff) | PCIEXBAR_PCIEXBAREN);
}
}