GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Add PC87382 support 

This patch adds support for NSC PC87382 Super I/O. It is used in many
Lenovo Notebooks as Docking LPC Switch.

v2 because of:

- Skip some empty files
- Fix newlines in Kconfig and Makefile.inc
- chip.h missed uart8250.h include
- add the Kconfig option in sorted order

Thanks to idwer on irc for pointing that out.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6332 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Sven Schnelle 2011-02-05 12:20:23 +00:00 committed by Peter Stuge
parent 7c2eec00a2
commit 92cf08c8f3
5 changed files with 165 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/superio/nsc/Makefile.inc
View File

@ -22,6 +22,7 @@ subdirs-y += pc87309
subdirs-y += pc87351
subdirs-y += pc87360
subdirs-y += pc87366
subdirs-y += pc87382
subdirs-y += pc87417
subdirs-y += pc87427
subdirs-y += pc97307

22
src/superio/nsc/pc87382/Makefile.inc Normal file
View File

@ -0,0 +1,22 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
ramstage-$(CONFIG_SUPERIO_NSC_PC87382) += superio.c

31
src/superio/nsc/pc87382/chip.h Normal file
View File

@ -0,0 +1,31 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef SUPERIO_NSC_PC87382_CHIP_H
#define SUPERIO_NSC_PC87382_CHIP_H
#include <uart8250.h>
extern struct chip_operations superio_nsc_pc87382_ops;
struct superio_nsc_pc87382_config {
struct uart8250 com1, com2;
};
#endif

28
src/superio/nsc/pc87382/pc87382.h Normal file
View File

@ -0,0 +1,28 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef SUPERIO_NSC_PC87382_H
#define SUPERIO_NSC_PC87382_H
#define PC87382_IR 0x02
#define PC87382_SP1 0x03
#define PC87382_GPIO 0x07
#define PC87382_DOCK 0x19
#endif

83
src/superio/nsc/pc87382/superio.c Normal file
View File

@ -0,0 +1,83 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <console/console.h>
#include <string.h>
#include <bitops.h>
#include <uart8250.h>
#include <pc80/keyboard.h>
#include <stdlib.h>
#include "chip.h"
#include "pc87382.h"
static void init(device_t dev)
{
struct superio_nsc_pc87382_config *conf = dev->chip_info;
struct resource *res0;
if (!dev->enabled)
return;
switch(dev->path.pnp.device) {
case PC87382_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com1);
break;
case PC87382_IR:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com2);
break;
case PC87382_DOCK:
break;
case PC87382_GPIO:
break;
}
}
static struct device_operations ops = {
.read_resources = pnp_read_resources,
.set_resources = pnp_set_resources,
.enable_resources = pnp_enable_resources,
.enable = pnp_enable,
.init = init,
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, PC87382_IR, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x07f8, 0 } },
{ &ops, PC87382_SP1, PNP_IO0 | PNP_IRQ0, { 0x07f8, 0 } },
{ &ops, PC87382_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 } },
{ &ops, PC87382_DOCK, PNP_IO0 | PNP_IRQ0, { 0xfffe, 0 } },
};
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &pnp_ops,
ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_nsc_pc87382_ops = {
CHIP_NAME("NSC PC87382 Docking LPC Switch")
.enable_dev = enable_dev,
};