diff --git a/src/mainboard/asrock/imb-a180/romstage.c b/src/mainboard/asrock/imb-a180/romstage.c
index 5b64cf9c05..8ce496b652 100644
--- a/src/mainboard/asrock/imb-a180/romstage.c
+++ b/src/mainboard/asrock/imb-a180/romstage.c
@@ -35,7 +35,8 @@
 #include "southbridge/amd/agesa/hudson/hudson.h"
 #include "cpu/amd/agesa/s3_resume.h"
 #include "cbmem.h"
-#include "superio/winbond/w83627uhg/early_serial.c"
+#include <superio/winbond/common/winbond.h>
+#include <superio/winbond/w83627uhg/w83627uhg.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627UHG_SP1)
 
@@ -80,9 +81,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		post_code(0x30);
 		post_code(0x31);
 
-		/* Set w83627uhg to 48MHz and enable w83627uhg */
-		w83627uhg_set_input_clk_sel(SERIAL_DEV, 0);
-		w83627uhg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+		/* w83627uhg has a default clk of 48MHz, p.9 of data-sheet */
+		winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 
 		console_init();
 	}
diff --git a/src/superio/winbond/w83627uhg/Makefile.inc b/src/superio/winbond/w83627uhg/Makefile.inc
index f3d04b99ca..7bb23c00b0 100644
--- a/src/superio/winbond/w83627uhg/Makefile.inc
+++ b/src/superio/winbond/w83627uhg/Makefile.inc
@@ -19,4 +19,3 @@
 ##
 
 ramstage-$(CONFIG_SUPERIO_WINBOND_W83627UHG) += superio.c
-
diff --git a/src/superio/winbond/w83627uhg/early_serial.c b/src/superio/winbond/w83627uhg/early_serial.c
deleted file mode 100644
index bfd08a3766..0000000000
--- a/src/superio/winbond/w83627uhg/early_serial.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2009 Dynon Avionics
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <arch/io.h>
-#include "w83627uhg.h"
-
-static void pnp_enter_ext_func_mode(device_t dev)
-{
-	u16 port = dev >> 8;
-	outb(0x87, port);
-	outb(0x87, port);
-}
-
-static void pnp_exit_ext_func_mode(device_t dev)
-{
-	u16 port = dev >> 8;
-	outb(0xaa, port);
-}
-
-/** Set the input clock to 24 or 48 MHz. */
-static void w83627uhg_set_input_clk_sel(device_t dev, u8 speed_24mhz)
-{
-	u8 value;
-
-	value = pnp_read_config(dev, 0x24);
-	value &= ~(1 << 6);
-	if (!speed_24mhz)
-		value |= (1 << 6);
-	pnp_write_config(dev, 0x24, value);
-}
-
-static void w83627uhg_enable_serial(device_t dev, u16 iobase)
-{
-	pnp_enter_ext_func_mode(dev);
-	pnp_set_logical_device(dev);
-	pnp_set_enable(dev, 0);
-	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
-	pnp_set_enable(dev, 1);
-	pnp_exit_ext_func_mode(dev);
-}
diff --git a/src/superio/winbond/w83627uhg/w83627uhg.h b/src/superio/winbond/w83627uhg/w83627uhg.h
index f5442bc836..1925a57431 100644
--- a/src/superio/winbond/w83627uhg/w83627uhg.h
+++ b/src/superio/winbond/w83627uhg/w83627uhg.h
@@ -37,4 +37,4 @@
 #define W83627UHG_SP5			14  /* Com5 */
 #define W83627UHG_SP6			15  /* Com6 */
 
-#endif
+#endif /* SUPERIO_WINBOND_W83627UHG_W83627UHG_H */