arch/riscv: mprv_read_*: Mark result as earlyclobber

This fixes a case of mstatus corruption, where GCC generated code that
used the same register for the mprv bit and the result.

GCC inline assembly register modifiers are documented here:
https://gcc.gnu.org/onlinedocs/gcc/Modifiers.html

Change-Id: I2c563d171892c2e22ac96b34663aa3965553ceb3
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/21688
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

src/arch/riscv/include/vm.h

@@ -73,7 +73,7 @@ void flush_tlb(void);
 			"csrs		mstatus, %1\n"			\
 			STRINGIFY(insn) " %0, 0(%2)\n"			\
 			"csrc		mstatus, %1\n"			\
-			: "=r"(value) : "r"(mprv), "r"(p) : "memory"	\
+			: "=&r"(value) : "r"(mprv), "r"(p) : "memory"	\
 		);							\
 		return value;						\
 	}